device: Use pcidev_on_root()

Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

10 files changed, 32 insertions, 32 deletions

diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c
index d97663d89e..0811fd2e1c 100644
--- a/src/mainboard/asus/f2a85-m/mptable.c
+++ b/src/mainboard/asus/f2a85-m/mptable.c
@@ -142,7 +142,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/asus/kcma-d8/acpi_tables.c b/src/mainboard/asus/kcma-d8/acpi_tables.c
index c1006e5e7c..ef074608af 100644
--- a/src/mainboard/asus/kcma-d8/acpi_tables.c
+++ b/src/mainboard/asus/kcma-d8/acpi_tables.c
@@ -41,7 +41,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 					   IO_APIC_ADDR, gsi_base);
 	/* IOAPIC on rs5690 */
 	gsi_base += 24;		/* SB700 has 24 IOAPIC entries. */
-	dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	dev = pcidev_on_root(0, 0);
 	if (dev) {
 		pci_write_config32(dev, 0xF8, 0x1);
 		dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
diff --git a/src/mainboard/asus/kcma-d8/mainboard.c b/src/mainboard/asus/kcma-d8/mainboard.c
index 8da41b085b..729ad35b13 100644
--- a/src/mainboard/asus/kcma-d8/mainboard.c
+++ b/src/mainboard/asus/kcma-d8/mainboard.c
@@ -28,7 +28,7 @@ void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x28282828);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x00000028);
 }
@@ -37,7 +37,7 @@ void set_pcie_dereset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x6F6F6F6F);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x0000006F);
 }
diff --git a/src/mainboard/asus/kcma-d8/mptable.c b/src/mainboard/asus/kcma-d8/mptable.c
index 44ba1567ae..54cf5edb69 100644
--- a/src/mainboard/asus/kcma-d8/mptable.c
+++ b/src/mainboard/asus/kcma-d8/mptable.c
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
 			 * 00:14.6: INTB MCI
 			 */
 		}
-		dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+		dev = pcidev_on_root(0, 0);
 		if (dev) {
 			pci_write_config32(dev, 0xF8, 0x1);
 			dword_ptr = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
@@ -125,32 +125,32 @@ static void *smp_write_config_table(void *v)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((11)<<2)|(0)), apicid_sr5650, 30);	/* Device 11 (LNKG, APIC pin 30) */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((12)<<2)|(0)), apicid_sr5650, 30);	/* Device 12 (LNKG, APIC pin 30) */
 
-	dev = dev_find_slot(0, PCI_DEVFN(0x2, 0));
+	dev = pcidev_on_root(0x2, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x2)|(0)), apicid_sr5650, 0);	/* card behind dev2 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x4, 0));
+	dev = pcidev_on_root(0x4, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x4)|(0)), apicid_sr5650, 0);	/* PIKE */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x9, 0));
+	dev = pcidev_on_root(0x9, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x9)|(0)), apicid_sr5650, 23);	/* NIC A */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xa, 0));
+	dev = pcidev_on_root(0xa, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xa)|(0)), apicid_sr5650, 24);	/* NIC B */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xb, 0));
+	dev = pcidev_on_root(0xb, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xb)|(0)), apicid_sr5650, 0);	/* card behind dev11 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xc, 0));
+	dev = pcidev_on_root(0xc, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xc)|(0)), apicid_sr5650, 0);	/* card behind dev12 */
@@ -177,7 +177,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(sp5100_bus_number, 0x11, 0x0, 0x16); /* 6, INTG */
 
 	/* PCI slots */
-	dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 
diff --git a/src/mainboard/asus/kfsn4-dre/acpi_tables.c b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
index 36f55afd47..e5e2613f28 100644
--- a/src/mainboard/asus/kfsn4-dre/acpi_tables.c
+++ b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
@@ -38,7 +38,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 	current = acpi_create_madt_lapics(current);
 
 	/* Write NVIDIA CK804 IOAPIC. */
-	dev = dev_find_slot(0x0, PCI_DEVFN(sysconf.sbdn + 0x1, 0));
+	dev = pcidev_on_root(sysconf.sbdn + 0x1, 0);
 	ASSERT(dev != NULL);
 
 	res = find_resource(dev, PCI_BASE_ADDRESS_1);
diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c
index c1006e5e7c..ef074608af 100644
--- a/src/mainboard/asus/kgpe-d16/acpi_tables.c
+++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c
@@ -41,7 +41,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 					   IO_APIC_ADDR, gsi_base);
 	/* IOAPIC on rs5690 */
 	gsi_base += 24;		/* SB700 has 24 IOAPIC entries. */
-	dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	dev = pcidev_on_root(0, 0);
 	if (dev) {
 		pci_write_config32(dev, 0xF8, 0x1);
 		dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
index 14a4a69762..02859369af 100644
--- a/src/mainboard/asus/kgpe-d16/mainboard.c
+++ b/src/mainboard/asus/kgpe-d16/mainboard.c
@@ -28,7 +28,7 @@ void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x28282828);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x00000028);
 }
@@ -37,7 +37,7 @@ void set_pcie_dereset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x6F6F6F6F);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x0000006F);
 }
diff --git a/src/mainboard/asus/kgpe-d16/mptable.c b/src/mainboard/asus/kgpe-d16/mptable.c
index c1b2a5de5d..3b7ff52ab7 100644
--- a/src/mainboard/asus/kgpe-d16/mptable.c
+++ b/src/mainboard/asus/kgpe-d16/mptable.c
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
 			 * 00:14.6: INTB MCI
 			 */
 		}
-		dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+		dev = pcidev_on_root(0, 0);
 		if (dev) {
 			pci_write_config32(dev, 0xF8, 0x1);
 			dword_ptr = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
@@ -126,37 +126,37 @@ static void *smp_write_config_table(void *v)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((12)<<2)|(0)), apicid_sr5650, 30);	/* Device 12 (LNKG, APIC pin 30) */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((13)<<2)|(0)), apicid_sr5650, 30);	/* Device 13 (LNKG, APIC pin 30)) */
 
-	dev = dev_find_slot(0, PCI_DEVFN(0x2, 0));
+	dev = pcidev_on_root(0x2, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x2)|(0)), apicid_sr5650, 0);	/* card behind dev2 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x4, 0));
+	dev = pcidev_on_root(0x4, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x4)|(0)), apicid_sr5650, 0);	/* PIKE */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x9, 0));
+	dev = pcidev_on_root(0x9, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x9)|(0)), apicid_sr5650, 23);	/* NIC A */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xa, 0));
+	dev = pcidev_on_root(0xa, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xa)|(0)), apicid_sr5650, 24);	/* NIC B */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xb, 0));
+	dev = pcidev_on_root(0xb, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xb)|(0)), apicid_sr5650, 0);	/* card behind dev11 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xc, 0));
+	dev = pcidev_on_root(0xc, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xc)|(0)), apicid_sr5650, 0);	/* card behind dev12 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xd, 0));
+	dev = pcidev_on_root(0xd, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xd)|(0)), apicid_sr5650, 0);	/* card behind dev13 */
@@ -183,7 +183,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(sp5100_bus_number, 0x11, 0x0, 0x16); /* 6, INTG */
 
 	/* PCI slots */
-	dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 
diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c
index b075c6938e..fb01236beb 100644
--- a/src/mainboard/asus/m4a78-em/mainboard.c
+++ b/src/mainboard/asus/m4a78-em/mainboard.c
@@ -40,7 +40,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -66,7 +66,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -84,7 +84,7 @@ int is_dev3_present(void)
 	struct device *sm_dev;
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* put the GPIO68 output to tristate */
 	word = pci_read_config16(sm_dev, 0x7e);
diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c
index 53c97b8d43..6d0f5497d9 100644
--- a/src/mainboard/asus/m4a785-m/mainboard.c
+++ b/src/mainboard/asus/m4a785-m/mainboard.c
@@ -50,7 +50,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -76,7 +76,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -94,7 +94,7 @@ int is_dev3_present(void)
 	struct device *sm_dev;
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* put the GPIO68 output to tristate */
 	word = pci_read_config16(sm_dev, 0x7e);
@@ -136,7 +136,7 @@ static void set_thermal_config(void)
 	pm2_iowrite(0x42, byte);
 
 	/* set GPIO 64 to input */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x56);
 	word |= 1 << 7;
 	pci_write_config16(sm_dev, 0x56, word);