diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 17:29:59 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 17:29:59 +0000 |
commit | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (patch) | |
tree | 3bf95eb33cd3de0b8f2bae495b3ae1453601c4d3 /src/mainboard/asus | |
parent | 5244e1ba63e5f3ea12066734bfb0d864a8f1f11d (diff) | |
download | coreboot-57b2ff886e0ce2c92820f5722c8031def3ac94cf.tar.xz |
Drop excessive whitespace randomly sprinkled in romstage.c files.
Also drop some dead or useless code snippets.
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r-- | src/mainboard/asus/a8n_e/romstage.c | 3 | ||||
-rw-r--r-- | src/mainboard/asus/a8v-e_deluxe/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/a8v-e_se/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/m2v-mx_se/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/m2v/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/m4a785-m/romstage.c | 10 |
6 files changed, 0 insertions, 29 deletions
diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index 155f414668..f911a9beba 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -69,10 +69,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" #include "southbridge/nvidia/ck804/ck804_early_setup.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" - #include "northbridge/amd/amdk8/early_ht.c" static void sio_setup(void) @@ -168,4 +166,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_cache_as_ram(); } - diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index fbefe34c0e..393e560be5 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -86,15 +86,12 @@ void soft_reset(void) // defines S3_NVRAM_EARLY: #include "southbridge/via/k8t890/k8t890_early_car.c" - #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" #include "lib/generic_sdram.c" - #include "cpu/amd/dualcore/dualcore.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" @@ -232,4 +229,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); } - diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index fbefe34c0e..393e560be5 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -86,15 +86,12 @@ void soft_reset(void) // defines S3_NVRAM_EARLY: #include "southbridge/via/k8t890/k8t890_early_car.c" - #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" #include "lib/generic_sdram.c" - #include "cpu/amd/dualcore/dualcore.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" @@ -232,4 +229,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); } - diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index e0b61fcbdb..a9cc6686cb 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -69,15 +69,12 @@ static void activate_spd_rom(const struct mem_controller *ctrl) // defines S3_NVRAM_EARLY: #include "southbridge/via/k8t890/k8t890_early_car.c" - #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" - #include "cpu/amd/dualcore/dualcore.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" @@ -202,4 +199,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); } - diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index d54d2d5efb..59b6c45bfc 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -71,15 +71,12 @@ static void activate_spd_rom(const struct mem_controller *ctrl) // defines S3_NVRAM_EARLY: #include "southbridge/via/k8t890/k8t890_early_car.c" - #include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" - #include "cpu/amd/dualcore/dualcore.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" @@ -304,4 +301,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); } - diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index f524a889d3..d59a468e35 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -38,22 +38,16 @@ #include "northbridge/amd/amdfam10/raminit.h" #include "northbridge/amd/amdfam10/amdfam10.h" #include <lib.h> - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdfam10/reset_test.c" - #include <console/loglevel.h> #include "cpu/x86/bist.h" - static int smbus_read_byte(u32 device, u32 address); - #include "superio/ite/it8712f/it8712f_early_serial.c" #include <usbdebug.h> - #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" - #include "southbridge/amd/rs780/rs780_early_setup.c" #include "southbridge/amd/sb700/sb700_early_setup.c" #include "northbridge/amd/amdfam10/debug.c" @@ -70,18 +64,14 @@ static int spd_read_byte(u32 device, u32 address) } #include "northbridge/amd/amdfam10/amdfam10.h" - #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c" - #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" - #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/microcode/microcode.c" #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c" - #include "northbridge/amd/amdfam10/early_ht.c" #include "southbridge/amd/sb700/sb700_early_setup.c" #include <spd.h> |