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authorMartin Roth <martinroth@google.com>2016-07-28 16:32:56 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-08-01 21:43:56 +0200
commitbb9722bd775d575401edff14a9b80406ecbd974a (patch)
tree7e16eb11f2681aeccbce658d4cac6a3510578528 /src/mainboard/asus
parent049b46270d63c47db75b27246555c904e42fe9e2 (diff)
downloadcoreboot-bb9722bd775d575401edff14a9b80406ecbd974a.tar.xz
Add newlines at the end of all coreboot files
Change-Id: I7930d5cded290f2605d0c92a9c465a3f0c1291a2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15974 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/kcma-d8/acpi_tables.c2
-rw-r--r--src/mainboard/asus/kcma-d8/spd_notes.txt2
-rw-r--r--src/mainboard/asus/kfsn4-dre/bootblock.c2
-rw-r--r--src/mainboard/asus/kfsn4-dre_k8/bootblock.c2
-rw-r--r--src/mainboard/asus/kgpe-d16/acpi_tables.c2
-rw-r--r--src/mainboard/asus/kgpe-d16/spd_notes.txt2
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/asus/kcma-d8/acpi_tables.c b/src/mainboard/asus/kcma-d8/acpi_tables.c
index f20e837556..8395b9d460 100644
--- a/src/mainboard/asus/kcma-d8/acpi_tables.c
+++ b/src/mainboard/asus/kcma-d8/acpi_tables.c
@@ -106,4 +106,4 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current)
current += 8;
return current;
-} \ No newline at end of file
+}
diff --git a/src/mainboard/asus/kcma-d8/spd_notes.txt b/src/mainboard/asus/kcma-d8/spd_notes.txt
index ddd5cc84d6..d944229f00 100644
--- a/src/mainboard/asus/kcma-d8/spd_notes.txt
+++ b/src/mainboard/asus/kcma-d8/spd_notes.txt
@@ -43,4 +43,4 @@ After that, there's a cascade of small FETs and resistors in that region, eventu
SuperIO pin 81 (VSBGATE#) enables the standby voltage rails when set LOW.
VSBGATE# is reset on every assertion of PWRGOOD.
-Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB. \ No newline at end of file
+Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.
diff --git a/src/mainboard/asus/kfsn4-dre/bootblock.c b/src/mainboard/asus/kfsn4-dre/bootblock.c
index 1542b9f131..b25b34f1a4 100644
--- a/src/mainboard/asus/kfsn4-dre/bootblock.c
+++ b/src/mainboard/asus/kfsn4-dre/bootblock.c
@@ -78,4 +78,4 @@ void bootblock_mainboard_init(void)
*/
#endif
}
-} \ No newline at end of file
+}
diff --git a/src/mainboard/asus/kfsn4-dre_k8/bootblock.c b/src/mainboard/asus/kfsn4-dre_k8/bootblock.c
index 1542b9f131..b25b34f1a4 100644
--- a/src/mainboard/asus/kfsn4-dre_k8/bootblock.c
+++ b/src/mainboard/asus/kfsn4-dre_k8/bootblock.c
@@ -78,4 +78,4 @@ void bootblock_mainboard_init(void)
*/
#endif
}
-} \ No newline at end of file
+}
diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c
index f20e837556..8395b9d460 100644
--- a/src/mainboard/asus/kgpe-d16/acpi_tables.c
+++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c
@@ -106,4 +106,4 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current)
current += 8;
return current;
-} \ No newline at end of file
+}
diff --git a/src/mainboard/asus/kgpe-d16/spd_notes.txt b/src/mainboard/asus/kgpe-d16/spd_notes.txt
index ddd5cc84d6..d944229f00 100644
--- a/src/mainboard/asus/kgpe-d16/spd_notes.txt
+++ b/src/mainboard/asus/kgpe-d16/spd_notes.txt
@@ -43,4 +43,4 @@ After that, there's a cascade of small FETs and resistors in that region, eventu
SuperIO pin 81 (VSBGATE#) enables the standby voltage rails when set LOW.
VSBGATE# is reset on every assertion of PWRGOOD.
-Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB. \ No newline at end of file
+Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.