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authorAngel Pons <th3fanbus@gmail.com>2020-05-21 15:29:17 +0200
committerNico Huber <nico.h@gmx.de>2020-05-26 11:47:02 +0000
commit64829161111ea833453df8479d1bada1f91ee511 (patch)
treef8bcb5788414ffc39f748fbb8bbef4ca3aa4a968 /src/mainboard/asus
parent7ee8e7f12969f3141fd0b1c814c3b648268156b8 (diff)
downloadcoreboot-64829161111ea833453df8479d1bada1f91ee511.tar.xz
AGESA f16kb: Factor out default MTRR settings
All AGESA f16kb boards use the same MTRR values. Factor them out, while still allowing a board to override them via BLDCFG. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: I236e9d45505e92027acc3ba5ff496f5e2f09b9f3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41665 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/am1i-a/buildOpts.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c
index fde272a9ba..b57581f092 100644
--- a/src/mainboard/asus/am1i-a/buildOpts.c
+++ b/src/mainboard/asus/am1i-a/buildOpts.c
@@ -218,24 +218,6 @@
// #define BLDCFG_FCH_GPP_PORT2_HOTPLUG FALSE
// #define BLDCFG_FCH_GPP_PORT3_HOTPLUG FALSE
-CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
-{
- { AMD_AP_MTRR_FIX64k_00000, 0x1E1E1E1E1E1E1E1E },
- { AMD_AP_MTRR_FIX16k_80000, 0x1E1E1E1E1E1E1E1E },
- { AMD_AP_MTRR_FIX16k_A0000, 0x0000000000000000 },
- { AMD_AP_MTRR_FIX4k_C0000, 0x0000000000000000 },
- { AMD_AP_MTRR_FIX4k_C8000, 0x0000000000000000 },
- { AMD_AP_MTRR_FIX4k_D0000, 0x0000000000000000 },
- { AMD_AP_MTRR_FIX4k_D8000, 0x0000000000000000 },
- { AMD_AP_MTRR_FIX4k_E0000, 0x1818181818181818 },
- { AMD_AP_MTRR_FIX4k_E8000, 0x1818181818181818 },
- { AMD_AP_MTRR_FIX4k_F0000, 0x1818181818181818 },
- { AMD_AP_MTRR_FIX4k_F8000, 0x1818181818181818 },
- { CPU_LIST_TERMINAL }
-};
-
-#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
-
/* MEMORY_BUS_SPEED */
//#define DDR400_FREQUENCY 200 ///< DDR 400
//#define DDR533_FREQUENCY 266 ///< DDR 533