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authorPhilipp Deppenwiese <zaolin@das-labor.org>2018-02-27 22:18:11 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-07-25 15:53:35 +0000
commitdb70f3bb4d5d58441b1c93d216347ec296b4f787 (patch)
treedfa44a3dc22d53f39d364b15c2f56792e0ef7115 /src/mainboard/asus
parentb009ac49c85161ea2746f8bdfc6ce28a8f46e8bc (diff)
downloadcoreboot-db70f3bb4d5d58441b1c93d216347ec296b4f787.tar.xz
drivers/tpm: Add TPM ramstage driver for devices without vboot.
Logic: If vboot is not used and the tpm is not initialized in the romstage makes use of the ramstage driver to initialize the TPM globally without having setup calls in lower SoC level implementations. * Add TPM driver in ramstage chip init which calls the tpm_setup function. * Purge all occurrences of TPM init code and headers. * Only compile TIS drivers into ramstage except for vboot usage. * Remove Google Urara/Rotor TPM support because of missing i2c driver in ramstage. Change-Id: I7536c9734732aeaa85ccc7916c12eecb9ca26b2e Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24905 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 6188fccb36..95fe630b9c 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -46,7 +46,6 @@
#include <cpu/amd/family_10h-family_15h/init_cpus.h>
#include <arch/early_variables.h>
#include <cbmem.h>
-#include <security/tpm/tspi.h>
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
@@ -624,9 +623,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x54, 0x0707);
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
-
- if (IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2))
- tpm_setup(s3resume);
}
/**