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| author | Rudolf Marek <r.marek@assembler.cz> | 2011-06-29 23:59:13 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-07-16 11:13:37 +0200 |
| commit | 43358a5e24da920b7ab8fb285c48f6f6f5955897 (patch) | |
| tree | 83bbb6a23bd3130d570c669bd11d07d305cd0bba /src/mainboard/asus | |
| parent | f7b30808f38eb236622902bfd93626dab4dbbb61 (diff) | |
| download | coreboot-43358a5e24da920b7ab8fb285c48f6f6f5955897.tar.xz | |
Workaround the errata #181.
We use LDTSTOP# to trigger the FID/VID change on K8M890, because the
FID/VID SMAF is blocked by not yet configured internal VGA.
The memory controller is enabled later, nor the workaround makes any
harm to non-affected CPUs.
This update unbreaks compilation by declaring the tmp variable.
Change-Id: Icf5d126b8c8cd9ece6af41d3129315a777c8cef2
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Cristian Măgherușan-Stanciu <cristi.magherusan@gmail.com>
Reviewed-on: http://review.coreboot.org/69
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/asus')
| -rw-r--r-- | src/mainboard/asus/m2v-mx_se/romstage.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 580d8fa50a..9825e2bcfb 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -74,10 +74,15 @@ static inline int spd_read_byte(unsigned device, unsigned address) #define SB_VFSMAF 0 -/* this function might fail on some K8 CPUs with errata #181 */ static void ldtstop_sb(void) { print_debug("toggle LDTSTP#\n"); + + /* fix errata #181, disable DRAM controller it will get enabled later */ + u8 tmp = pci_read_config8(PCI_DEV(0, 0x18, 2), 0x94); + tmp |= (( 1 << 14) | (1 << 3)); + pci_write_config8(PCI_DEV(0, 0x18, 2), 0x94, tmp); + u8 reg = inb (VT8237R_ACPI_IO_BASE + 0x5c); reg = reg ^ (1 << 0); outb(reg, VT8237R_ACPI_IO_BASE + 0x5c); |