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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-07 14:36:16 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-07 14:36:16 +0000 |
| commit | 31f81a6de1515df2eebcf6e1b1afd545fc7a2714 (patch) | |
| tree | 3ab6e3da26b92933db7a5625c5df46845270415e /src/mainboard/axus/tc320 | |
| parent | fdfaada706037287c74e2541a6151f16d93b9be1 (diff) | |
| download | coreboot-31f81a6de1515df2eebcf6e1b1afd545fc7a2714.tar.xz | |
Enable full ROM access on AMD CS5530(A) (needed for CBFS).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/axus/tc320')
| -rw-r--r-- | src/mainboard/axus/tc320/auto.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/axus/tc320/auto.c b/src/mainboard/axus/tc320/auto.c index 31af3b905b..6d5843dd24 100644 --- a/src/mainboard/axus/tc320/auto.c +++ b/src/mainboard/axus/tc320/auto.c @@ -32,6 +32,7 @@ #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" #include "cpu/x86/bist.h" +#include "southbridge/amd/cs5530/cs5530_enable_rom.c" #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) @@ -41,6 +42,7 @@ static void main(unsigned long bist) uart_init(); console_init(); report_bist_failure(bist); + cs5530_enable_rom(); sdram_init(); /* ram_check(0, 640 * 1024); */ } |