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authorIru Cai <mytbk920423@gmail.com>2019-01-12 17:43:14 +0800
committerIru Cai <mytbk920423@gmail.com>2020-05-13 21:18:24 +0800
commitb7e37fd69e0adfec24d90b97d17dc1f42ab9aae8 (patch)
tree11ffc6a06a23d8f6e7a2c9876ac55cdbada547c7 /src/mainboard/azza
parentf0045eb373c5376510d111c5e1091134c186884e (diff)
downloadcoreboot-b7e37fd69e0adfec24d90b97d17dc1f42ab9aae8.tar.xz
autoport: Add support for Haswell-LynxPoint platform
It can generate a working source code for Clevo W650SZ and Lenovo ThinkPad T440p. Patchset 11: some fix up for the current coreboot code and LP PCH - calculate backlight frequency according in the latest Haswell devicetree - there's some small difference in reading flash chip size for LP PCH - only output 8 USB ports for LP PCH Unresolved issues: - Should we use DxxIR registers from the machine running factory firmware? TODO: - Support Lynx Point LP - GPIO - GPE support - Detect and generate the lengths and locations of the USB2 ports (need to read IOBP registers) Change-Id: I4f6e8c97b5122101de2f36bba8ba9f8ddd5b813a Signed-off-by: Iru Cai <mytbk920423@gmail.com>
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