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authorFabian Kunkel <fabi@adv.bruhnspace.com>2016-07-27 17:42:39 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-07-30 06:51:13 +0200
commitcf05183d1f952a903057038aee3a71698ce564b0 (patch)
treef7e46a4f70131066396b7c519ba661c4a51e43c1 /src/mainboard/bap/ode_e21XX/devicetree.cb
parent171e2c965aef8b47d39611280121fd2b66136df4 (diff)
downloadcoreboot-cf05183d1f952a903057038aee3a71698ce564b0.tar.xz
mainboard/bap/ode_e21XX: Add board support
Add next generation of BAPs (https://www.unibap.com/) SOC module, called ode_e21XX. Hardware is similar to e20XX (AMD G-Series GX-411GA Kabini), but it includes a new AMD G-Series GX-412HC (Steppe Eagle) and an updated Microsemi FPGA. Changes to Olivehillplus: - Add SuperIO Fintek F81866D - Soldered down DDR3 with ECC - User can choose between different DDR3 clk settings (lowest setting can save up to 1.2W) - Soldered down Microsemi M2S060 FPGA on PCIe lanes 2-3 Tested with: - Payload SeaBIOS 1.9.1 - Lubuntu 16.04, Kernel 4.4.0 - Windows 10 (UART functionality) Known problems: - S3 not working - IOMMU not working Change-Id: I41f6a3334ad2128695a3f7c0a6444f1678d2626e Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: https://review.coreboot.org/15918 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/bap/ode_e21XX/devicetree.cb')
-rw-r--r--src/mainboard/bap/ode_e21XX/devicetree.cb80
1 files changed, 62 insertions, 18 deletions
diff --git a/src/mainboard/bap/ode_e21XX/devicetree.cb b/src/mainboard/bap/ode_e21XX/devicetree.cb
index ee0cd98bfe..1a900c0c7c 100644
--- a/src/mainboard/bap/ode_e21XX/devicetree.cb
+++ b/src/mainboard/bap/ode_e21XX/devicetree.cb
@@ -30,10 +30,9 @@ chip northbridge/amd/pi/00730F01/root_complex
device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # x4 PCIe slot
- device pci 2.2 on end # mPCIe slot
- device pci 2.3 on end # Realtek NIC
- device pci 2.4 on end # Edge Connector
- device pci 2.5 on end # Edge Connector
+ device pci 2.2 on end # PCIe Q7 Realtek GBit LAN
+ device pci 2.3 on end # PCIe CB Realtek GBit LAN
+ device pci 2.4 on end # PCIe x2 BAP FPGA
device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01
@@ -42,18 +41,67 @@ chip northbridge/amd/pi/00730F01/root_complex
device pci 11.0 on end # SATA
device pci 12.0 on end # EHCI #0
device pci 13.0 on end # EHCI #1
- device pci 14.0 on # SMBus
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 50 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 51 on end
- end
- end # SMbus
+ device pci 14.0 on end # SMBus
device pci 14.2 on end # HDA 0x4383
- device pci 14.3 on end # LPC 0x439d
+ device pci 14.3 on # LPC 0x439d
+ chip superio/fintek/f81866d
+ register "hwm_amd_tsi_addr" = "0x98" # Set to AMD
+ register "hwm_amd_tsi_control" = "0x02" # Set to AMD
+ register "hwm_fan_select" = "0xC0" # Sets Fan2 to PWM
+ register "hwm_fan_mode" = "0xD5" # Sets FAN1-3 to Auto RPM mode
+ register "hwm_fan3_control" = "0x00" # Fan control 23kHz
+ register "hwm_fan2_temp_map_select" = "0x1E" # Fan control 23kHz
+ register "hwm_fan2_bound1" = "0x3C" # 60°C
+ register "hwm_fan2_bound2" = "0x32" # 50°C
+ register "hwm_fan2_bound3" = "0x28" # 40°C
+ register "hwm_fan2_bound4" = "0x1E" # 30°C
+ register "hwm_fan2_seg1_speed" = "0xFF" # 100%
+ register "hwm_fan2_seg2_speed" = "0xD9" # 85%
+ register "hwm_fan2_seg3_speed" = "0xB2" # 70%
+ register "hwm_fan2_seg4_speed" = "0x99" # 60%
+ register "hwm_fan2_seg5_speed" = "0x80" # 50%
+ register "hwm_temp_sens_type" = "0x04" # Sets temp sensor 1 type to to thermistor
+ device pnp 4e.0 off # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 4e.3 off end # Parallel Port
+ device pnp 4e.4 on # Hardware Monitor
+ io 0x60 = 0x295
+ irq 0x70 = 0
+ end
+ device pnp 4e.5 off # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ end
+ device pnp 4e.6 off end # GPIO
+ device pnp 4e.7 on end # WDT
+ device pnp 4e.a off end # PME
+ device pnp 4e.10 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 4e.11 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 4e.12 off # COM3
+ io 0x60 = 0x3e8
+ irq 0x70 = 4
+ end
+ device pnp 4e.13 off # COM4
+ io 0x60 = 0x2e8
+ irq 0x70 = 3
+ end
+ device pnp 4e.14 off # COM5
+ end
+ device pnp 4e.15 off # COM6
+ end
+ end # f81866d
+ end #LPC
device pci 14.7 on end # SD
- device pci 16.0 on end # EHCI #2
end #chip southbridge/amd/pi/hudson
device pci 18.0 on end
@@ -62,10 +110,6 @@ chip northbridge/amd/pi/00730F01/root_complex
device pci 18.3 on end
device pci 18.4 on end
device pci 18.5 on end
- register "spdAddrLookup" = "
- {
- { {0xA0, 0xA2} }, // socket 0, channel 0, slots 0 & 1 - 8-bit SPD addresses
- }"
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain