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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-10 06:30:54 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-12 16:09:31 +0000
commitf7ca672118b4d14c1e3686728c115df7adc2ec1d (patch)
treeae4290b8644a823e4e21109c7dcc38de830dab8e /src/mainboard/bap
parentf3ec5ed5559c59a63419f20246751e6f39225ef7 (diff)
downloadcoreboot-f7ca672118b4d14c1e3686728c115df7adc2ec1d.tar.xz
AGESA boards: Clean up some includes
Change-Id: I84c70aa04ab556a3898d3525f7b9aab85812f61d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/bap')
-rw-r--r--src/mainboard/bap/ode_e20XX/mainboard.c9
1 files changed, 1 insertions, 8 deletions
diff --git a/src/mainboard/bap/ode_e20XX/mainboard.c b/src/mainboard/bap/ode_e20XX/mainboard.c
index 7e729f0c06..0f4fbb355f 100644
--- a/src/mainboard/bap/ode_e20XX/mainboard.c
+++ b/src/mainboard/bap/ode_e20XX/mainboard.c
@@ -17,18 +17,11 @@
#include <console/console.h>
#include <device/device.h>
-#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
-#include <device/pci_def.h>
-#include <arch/acpi.h>
+
#include <southbridge/amd/agesa/hudson/pci_devs.h>
#include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <northbridge/amd/agesa/family16kb/pci_devs.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
/***********************************************************
* These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.