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| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2016-03-13 21:19:45 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-15 21:38:20 +0100 |
| commit | 3385ebe59a452ce66e0180641de271b028a41e7e (patch) | |
| tree | 7d01ddbe4e70afb140e90e4bbfdf04f5c731bca2 /src/mainboard/bap | |
| parent | 8ebb95d0c8e9088c9961cf3f8a3fdfed17f0247e (diff) | |
| download | coreboot-3385ebe59a452ce66e0180641de271b028a41e7e.tar.xz | |
pcengines/apu1: Enable USB overcurrent detection.
The two external USB ports and the internal USB header have overcurrent
protection chips with the low-active overcurrent signal connected to the
chipset.
The power-on default for this register disables the software detection
of overcurrent conditions.
After setting the register Linux correctly shows the overcurrent
condition in the kernel log (tested by shorting the 5v and gnd lines on
J14 / the internal USB header):
[ 2015.229921] usb usb1-port3: over-current condition
[ 2015.449925] usb usb1-port4: over-current condition
Simlar for the external ports:
[ 256.237916] usb usb1-port1: over-current condition
[ 256.458084] usb usb1-port5: over-current condition
Note that each signal is shared between two ports:
usboc0#: External ports (port1/5)
usboc1#: Internal ports (port3/4)
Change-Id: I02d498053b8ec61dc206e74a96c4a1dcfd4fae92
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: https://review.coreboot.org/14084
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/bap')
0 files changed, 0 insertions, 0 deletions