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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-07 23:42:58 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-08 13:54:47 +0200 |
| commit | 7974471e379e3aaefc0ecd5524c408e69537444b (patch) | |
| tree | 4b01576406def94a93142f98a4639a7244dbbd12 /src/mainboard/bifferos/bifferboard | |
| parent | 1f19d3494142bd12fa6d75f5761865346da5bcc5 (diff) | |
| download | coreboot-7974471e379e3aaefc0ecd5524c408e69537444b.tar.xz | |
mainboard: Trivial - drop trailing blank lines at EOF
Change-Id: I05d6d22664155ac8478e665733f816776e277c22
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6200
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/bifferos/bifferboard')
| -rw-r--r-- | src/mainboard/bifferos/bifferboard/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/bifferos/bifferboard/romstage.c b/src/mainboard/bifferos/bifferboard/romstage.c index cdf2544ba2..dd2553e9ba 100644 --- a/src/mainboard/bifferos/bifferboard/romstage.c +++ b/src/mainboard/bifferos/bifferboard/romstage.c @@ -60,4 +60,3 @@ static void main(void) /* Route Cseg, Dseg, Eseg and Fseg to RAM */ pci_write_config32(PCI_DEV(0,0,0), 0x84, 0x3ffffff0); } - |