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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-12-01 17:42:04 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-12 19:28:33 +0000 |
| commit | af258cc1791b5c46fcb13d41128cc99043a435be (patch) | |
| tree | 3c143244682d60fed4172086832ae9e4ad66fd76 /src/mainboard/biostar | |
| parent | cbbfb702f693c1bbaf83a9d3d8a3c0caabda1814 (diff) | |
| download | coreboot-af258cc1791b5c46fcb13d41128cc99043a435be.tar.xz | |
mb/*/*: use ACPIMMIO common block wherever possible
TEST=boot PC Engines apu2 and launch Debian Linux
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/biostar')
| -rw-r--r-- | src/mainboard/biostar/a68n_5200/romstage.c | 6 | ||||
| -rw-r--r-- | src/mainboard/biostar/am1ml/bootblock.c | 10 |
2 files changed, 4 insertions, 12 deletions
diff --git a/src/mainboard/biostar/a68n_5200/romstage.c b/src/mainboard/biostar/a68n_5200/romstage.c index 09098f7d8b..5e0cd7c83d 100644 --- a/src/mainboard/biostar/a68n_5200/romstage.c +++ b/src/mainboard/biostar/a68n_5200/romstage.c @@ -16,6 +16,7 @@ */ #include <stdint.h> +#include <amdblocks/acpimmio.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pci_ops.h> @@ -32,13 +33,11 @@ static void sbxxx_enable_48mhzout(void) { /* most likely programming to 48MHz out signal */ - /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ u32 reg32; reg32 = misc_read32(0x28); reg32 &= 0xfff8ffff; misc_write32(0x28, reg32); - /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ reg32 = misc_read32(0x40); reg32 &= 0xffffbffb; misc_write32(0x40, reg32); @@ -49,8 +48,7 @@ void board_BeforeAgesa(struct sysinfo *cb) u8 byte; /* Enable the AcpiMmio space */ - outb(0x24, 0xcd6); - outb(0x1, 0xcd7); + pm_io_write8(0x24, 1); /* Set LPC decode enables. */ pci_devfn_t dev = PCI_DEV(0, 0x14, 3); diff --git a/src/mainboard/biostar/am1ml/bootblock.c b/src/mainboard/biostar/am1ml/bootblock.c index 771745e9bd..3eceaa782d 100644 --- a/src/mainboard/biostar/am1ml/bootblock.c +++ b/src/mainboard/biostar/am1ml/bootblock.c @@ -61,20 +61,14 @@ static void ite_gpio_conf(pnp_devfn_t dev) void bootblock_mainboard_early_init(void) { - u32 reg32; - /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ pm_write8(0xea, 0x1); /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ - reg32 = misc_read32(0x28); - reg32 &= 0xfff8ffff; - misc_write32(0x28, reg32); + misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff); /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ - reg32 = misc_read32(0x40); - reg32 &= 0xffffbffb; - misc_write32(0x49, reg32); + misc_write32(0x40, misc_read32(0x40) & 0xffffbffb); /* Configure SIO as made under vendor BIOS */ ite_evc_conf(ENVC_DEV); |