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| author | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 20:46:15 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 20:46:15 +0000 |
| commit | d4b278c02c1da92219ebeb34204b9768934aeca3 (patch) | |
| tree | 488d097cac9744cfc9b8ff7c89ce69bcb21370cb /src/mainboard/broadcom/blast | |
| parent | 2e3757d11c565a8fe68dc2a2c34975e98304533c (diff) | |
| download | coreboot-d4b278c02c1da92219ebeb34204b9768934aeca3.tar.xz | |
AMD Rev F support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/broadcom/blast')
| -rw-r--r-- | src/mainboard/broadcom/blast/Options.lb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/broadcom/blast/Options.lb b/src/mainboard/broadcom/blast/Options.lb index 02bb6eb035..c64c7cf048 100644 --- a/src/mainboard/broadcom/blast/Options.lb +++ b/src/mainboard/broadcom/blast/Options.lb @@ -53,10 +53,10 @@ uses OBJCOPY uses CONFIG_CHIP_NAME uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN -uses K8_HW_MEM_HOLE_SIZEK +uses HW_MEM_HOLE_SIZEK uses HT_CHAIN_UNITID_BASE uses HT_CHAIN_END_UNITID_BASE -uses K8_SB_HT_CHAIN_ON_BUS0 +uses SB_HT_CHAIN_ON_BUS0 uses USE_DCACHE_RAM uses DCACHE_RAM_BASE @@ -128,7 +128,7 @@ default CONFIG_LOGICAL_CPUS=1 default CONFIG_CHIP_NAME=1 #1G memory hole -default K8_HW_MEM_HOLE_SIZEK=0x100000 +default HW_MEM_HOLE_SIZEK=0x100000 #VGA Console #default CONFIG_CONSOLE_VGA=1 @@ -141,7 +141,7 @@ default HT_CHAIN_UNITID_BASE=0x6 default HT_CHAIN_END_UNITID_BASE=0x1 #make the SB HT chain on bus 0 -default K8_SB_HT_CHAIN_ON_BUS0=1 +default SB_HT_CHAIN_ON_BUS0=1 ## ## enable CACHE_AS_RAM specifics |