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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-08-12 15:00:51 +0000
committerRonald G. Minnich <rminnich@gmail.com>2009-08-12 15:00:51 +0000
commit0588d19abef62dad63a7794a37bdd6a71c526d9e (patch)
tree1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/broadcom
parent38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff)
downloadcoreboot-0588d19abef62dad63a7794a37bdd6a71c526d9e.tar.xz
Kconfig!
Works on Kontron, qemu, and serengeti. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> tested on abuild only. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/broadcom')
-rw-r--r--src/mainboard/broadcom/Kconfig1
-rw-r--r--src/mainboard/broadcom/blast/devicetree.cb148
2 files changed, 149 insertions, 0 deletions
diff --git a/src/mainboard/broadcom/Kconfig b/src/mainboard/broadcom/Kconfig
new file mode 100644
index 0000000000..792d600548
--- /dev/null
+++ b/src/mainboard/broadcom/Kconfig
@@ -0,0 +1 @@
+#
diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb
new file mode 100644
index 0000000000..4c35506332
--- /dev/null
+++ b/src/mainboard/broadcom/blast/devicetree.cb
@@ -0,0 +1,148 @@
+chip northbridge/amd/amdk8/root_complex
+ device apic_cluster 0 on
+ chip cpu/amd/socket_940
+ device apic 0 on end
+ end
+ end
+ device pci_domain 0 on
+ chip northbridge/amd/amdk8
+ device pci 18.0 on # northbridge
+ # devices on link 0
+ chip southbridge/broadcom/bcm5780 # HT2000
+ device pci 0.0 on end # PXB 1 0x0130
+ device pci 1.0 on # PXB 2 0x0130
+ device pci 4.0 on end # GB E 0x1668 vid = 0x14e4
+ device pci 4.1 on end # GB E 0x1669 vid = 0x14e4
+ end
+ device pci 2.0 on end # PCI E 1 #0x0132
+ device pci 3.0 on end # PCI E 2
+ device pci 4.0 on end # PCI E 3
+ device pci 5.0 on end # PCI E 4
+ end
+ chip southbridge/broadcom/bcm5785 # HT1000
+ device pci 0.0 on # HT PXB 0x0036
+ device pci d.0 on end # PPBX 0x0104
+ device pci e.0 on end # SATA 0x024a
+ end
+ device pci 1.0 on # Legacy pci main 0x0205
+ chip drivers/i2c/i2cmux2 # pca9554 smbus mux
+ device i2c 71 on end #0 pca9554 0
+ device i2c 71 on end #0 pca9554 1
+ device i2c 71 on end #0 pca9554 2
+ device i2c 71 on end #0 pca9554 3
+ device i2c 71 on end #0 pca9554 4
+ device i2c 71 on end #0 pca9554 5
+ device i2c 71 on #0 pca9554 6
+ chip drivers/generic/generic #dimm 0-0-0
+ device i2c 50 on end
+ end
+ chip drivers/generic/generic #dimm 0-0-1
+ device i2c 51 on end
+ end
+ chip drivers/generic/generic #dimm 0-1-0
+ device i2c 52 on end
+ end
+ chip drivers/generic/generic #dimm 0-1-1
+ device i2c 53 on end
+ end
+ end
+ device i2c 71 on #1 pca9554 7
+ chip drivers/generic/generic #dimm 1-0-0
+ device i2c 50 on end
+ end
+ chip drivers/generic/generic #dimm 1-0-1
+ device i2c 51 on end
+ end
+ chip drivers/generic/generic #dimm 1-1-0
+ device i2c 52 on end
+ end
+ chip drivers/generic/generic #dimm 1-1-1
+ device i2c 53 on end
+ end
+ end
+ end
+
+ end
+ device pci 1.1 on end # IDE 0x0214
+ device pci 1.2 on # LPC 0x0234
+ chip superio/nsc/pc87417
+ device pnp 2e.0 off # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 off # Parallel Port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 2e.2 off # Com 2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.3 on # Com 1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.4 off end # SWC
+ device pnp 2e.5 off end # Mouse
+ device pnp 2e.6 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ end
+ device pnp 2e.7 off end # GPIO
+ device pnp 2e.f off end # XBUS
+ device pnp 2e.10 on #RTC
+ io 0x60 = 0x70
+ io 0x62 = 0x72
+ end
+ end
+ end
+ device pci 1.3 on end # WDTimer 0x0238
+ device pci 1.4 on end # XIOAPIC0 0x0235
+ device pci 1.5 on end # XIOAPIC1
+ device pci 1.6 on end # XIOAPIC2
+ device pci 2.0 on end # USB 0x0223
+ device pci 2.1 on end # USB
+ device pci 2.2 on end # USB
+ #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,),
+ chip drivers/pci/onboard
+ device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address
+ # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4
+ register "rom_address" = "0xfff80000"
+ end
+ end
+ #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,)
+# chip drivers/pci/onboard
+# device pci 0.0 on end # fake, will be disabled
+# end
+# chip drivers/pci/onboard
+# device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed
+# register "rom_address" = "0xfff80000"
+# end
+
+
+ end # device pci 18.0
+
+ device pci 18.0 on end
+ device pci 18.0 on end
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ end
+
+
+ end #pci_domain
+# chip drivers/generic/debug
+# device pnp 0.0 off end # chip name
+# device pnp 0.1 on end # pci_regs_all
+# device pnp 0.2 off end # mem
+# device pnp 0.3 off end # cpuid
+# device pnp 0.4 off end # smbus_regs_all
+# device pnp 0.5 off end # dual core msr
+# device pnp 0.6 off end # cache size
+# device pnp 0.7 off end # tsc
+# end
+
+end
+