get_bus_cong using sysconf instead

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 36 insertions, 36 deletions

diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
index 3ed4001a9f..e7266903eb 100644
--- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c
+++ b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
@@ -4,7 +4,7 @@
 
 //#define K8_SCAN_PCI_BUS 1
 
-#define K8_4RANK_DIMM_SUPPORT 1
+#define QRANK_DIMM_SUPPORT 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
diff --git a/src/mainboard/broadcom/blast/cmos.layout b/src/mainboard/broadcom/blast/cmos.layout
index 5eb88b9a5a..c1f3d75316 100644
--- a/src/mainboard/broadcom/blast/cmos.layout
+++ b/src/mainboard/broadcom/blast/cmos.layout
@@ -78,10 +78,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     DDR400
-8     1     DDR333
-8     2     DDR266
-8     3     DDR200
+8     0     200Mhz
+8     1     166Mhz
+8     2     133Mhz
+8     3     100Mhz
 9     0     off
 9     1     87.5%
 9     2     75.0%
diff --git a/src/mainboard/broadcom/blast/get_bus_conf.c b/src/mainboard/broadcom/blast/get_bus_conf.c
index 44a9fc018e..95f9d12175 100644
--- a/src/mainboard/broadcom/blast/get_bus_conf.c
+++ b/src/mainboard/broadcom/blast/get_bus_conf.c
@@ -7,10 +7,22 @@
 #include <cpu/amd/dualcore.h>
 #endif
 
-unsigned sblk;
-unsigned pci1234[] =
+#include <cpu/amd/amdk8_sysconf.h>
+
+
+// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
+//busnum is default
+unsigned char bus_isa = 10;
+unsigned char bus_bcm5780[7];
+unsigned char bus_bcm5785_0 = 1;
+unsigned char bus_bcm5785_1 = 8;
+unsigned char bus_bcm5785_1_1 = 9;
+unsigned apicid_bcm5785[3];
+
+
+unsigned pci1234x[] = 
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
-         //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
 //        0x0000ff0,
 //        0x0000ff0,
@@ -20,9 +32,7 @@ unsigned pci1234[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
-unsigned hc_possible_num;
-unsigned sbdn;
-unsigned hcdn[] =
+unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
         0x20202020,
 //        0x20202020,
@@ -33,16 +43,6 @@ unsigned hcdn[] =
 //        0x20202020,
 //        0x20202020,
 };
-
-// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
-//busnum is default
-unsigned char bus_isa = 10;
-unsigned char bus_bcm5780[7];
-unsigned char bus_bcm5785_0 = 1;
-unsigned char bus_bcm5785_1 = 8;
-unsigned char bus_bcm5785_1_1 = 9;
-unsigned apicid_bcm5785[3];
-
 unsigned sbdn2;
 
 extern void get_sblk_pci1234(void);
@@ -61,18 +61,22 @@ void get_bus_conf(void)
 
         get_bus_conf_done = 1;
 
-        hc_possible_num = sizeof(pci1234)/sizeof(pci1234[0]);
+        sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]);
+        for(i=0;i<sysconf.hc_possible_num; i++) {
+                sysconf.pci1234[i] = pci1234x[i];
+                sysconf.hcdn[i] = hcdnx[i];
+        }
 
         get_sblk_pci1234();
 
-        sbdn = (hcdn[0] >> 8) & 0xff;
-        sbdn2 = hcdn[0] & 0xff; // bcm5780
+        sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
+        sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
 
-	bus_bcm5785_0 = (pci1234[0] >> 16) & 0xff;
+	bus_bcm5785_0 = (sysconf.pci1234[0] >> 16) & 0xff;
 	bus_bcm5780[0] = bus_bcm5785_0;
 
                 /* bcm5785 */
-        dev = dev_find_slot(bus_bcm5785_0, PCI_DEVFN(sbdn,0));
+        dev = dev_find_slot(bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn,0));
         if (dev) {
                 bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 		dev = dev_find_slot(bus_bcm5785_1, PCI_DEVFN(0x0d,0));
diff --git a/src/mainboard/broadcom/blast/irq_tables.c b/src/mainboard/broadcom/blast/irq_tables.c
index 6695a900aa..3f9adebec3 100644
--- a/src/mainboard/broadcom/blast/irq_tables.c
+++ b/src/mainboard/broadcom/blast/irq_tables.c
@@ -10,9 +10,7 @@
 #include <stdint.h>
 #include <arch/pirq_routing.h>
 
-extern unsigned pci1234[];
-extern  unsigned sbdn;
-extern  unsigned hcdn[];
+#include <cpu/amd/amdk8_sysconf.h>
 
 static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
                 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
@@ -71,7 +69,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 	pirq->version  = PIRQ_VERSION;
 	
 	pirq->rtr_bus = bus_bcm5785_0;
-	pirq->rtr_devfn = (sbdn<<3)|0;
+	pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
 
 	pirq->exclusive_irqs = 0;
 	
@@ -87,7 +85,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 	pirq_info = (void *) ( &pirq->checksum + 1);
 	slot_num = 0;
 //pci bridge
-	write_pirq_info(pirq_info, bus_bcm5785_0, (sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
+	write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
              
 	pirq->size = 32 + 16 * slot_num; 
diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c
index 77dc75db73..d754cb7101 100644
--- a/src/mainboard/broadcom/blast/mptable.c
+++ b/src/mainboard/broadcom/blast/mptable.c
@@ -8,9 +8,7 @@
 #include <cpu/amd/dualcore.h>
 #endif
 
-extern unsigned pci1234[];
-extern  unsigned sbdn;
-extern  unsigned hcdn[];
+#include <cpu/amd/amdk8_sysconf.h>
 
 extern  unsigned char bus_isa;
 extern  unsigned char bus_bcm5780[7];
@@ -95,7 +93,7 @@ void *smp_write_config_table(void *v)
 //IDE	
 	outb(0x02, 0xc00); outb(0x0e, 0xc01);
 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_bcm5785_0, ((1+sbdn)<<2)|1, apicid_bcm5785[0], 0xe); // IDE
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, apicid_bcm5785[0], 0xe); // IDE
 
 //SATA
 	outb(0x07, 0xc00); outb(0x0f, 0xc01);
@@ -104,7 +102,7 @@ void *smp_write_config_table(void *v)
 //USB
 	outb(0x01, 0xc00); outb(0x0a, 0xc01);
         for(i=0;i<3;i++) {
-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sbdn)<<2)|i, apicid_bcm5785[0], 0xa); //
+                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); //
         }