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author | David Hendricks <dhendricks@fb.com> | 2017-12-01 20:49:48 -0800 |
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committer | Patrick Rudolph <siro@das-labor.org> | 2018-07-10 07:01:57 +0000 |
commit | 8cbd569f74d8929387730e45b0d6e993b1365c02 (patch) | |
tree | ca6414a4d81e37280887b0da0f1a6120a50f0a3a /src/mainboard/cavium/cn8100_sff_evb/Kconfig | |
parent | 03d31427338ba59d3a354ac1beb3b0c153471768 (diff) | |
download | coreboot-8cbd569f74d8929387730e45b0d6e993b1365c02.tar.xz |
cavium: Add CN81xx SoC and eval board support
This adds Cavium CN81xx SoC and SFF EVB files.
Code is based off of Cavium's Octeon-TX SDK:
https://github.com/Cavium-Open-Source-Distributions/OCTEON-TX-SDK
BDK coreboot differences:
bootblock:
- Get rid of BDK header
- Add Kconfig for link address
- Move CAR setup code into assembly
- Move unaligned memory access enable into assembly
- Implement custom bootblock entry function
- Add CLIB and CSIB blobs
romstage:
- Use minimal DRAM init only
devicetree:
- Convert FTD to static C file containing key value pairs
Tested on CN81xx:
- Boots to payload
- Tested with GNU/Linux 4.16.3
- All hardware is usable (after applying additional commits)
Implemented in future commits:
- Vboot integration
- MMU suuport
- L2 Cache handling
- ATF from external repo
- Devicetree patching
- Extended DRAM testing
- UART init
Not working:
- Booting a payload
- Booting upstream ATF
TODO:
- Configuration straps
Change-Id: I47b4412d29203b45aee49bfa026c1d86ef7ce688
Signed-off-by: David Hendricks <dhendricks@fb.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/23037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/mainboard/cavium/cn8100_sff_evb/Kconfig')
-rw-r--r-- | src/mainboard/cavium/cn8100_sff_evb/Kconfig | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/src/mainboard/cavium/cn8100_sff_evb/Kconfig b/src/mainboard/cavium/cn8100_sff_evb/Kconfig new file mode 100644 index 0000000000..c311b1dbd8 --- /dev/null +++ b/src/mainboard/cavium/cn8100_sff_evb/Kconfig @@ -0,0 +1,68 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2018 Facebook, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +if BOARD_CAVIUM_CN8100_SFF_EVB + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select COMMON_CBFS_SPI_WRAPPER + select RTC + select SOC_CAVIUM_CN81XX + select SPI_FLASH + select SPI_FLASH_STMICRO + +config MAINBOARD_DIR + string + default "cavium/cn8100_sff_evb" + +config MAINBOARD_VENDOR + string + default "Cavium" + +config DRAM_SIZE_MB + int + default 8192 + +config BOOT_DEVICE_SPI_FLASH_BUS + int + default 0 + +config CONSOLE_SERIAL_UART_ADDRESS + hex + depends on DRIVERS_UART + default 0x87E028000000 + +config UART_FOR_CONSOLE + int + depends on DRIVERS_UART + default 0 + +config FMDFILE + string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd" + +########################################################## +#### Update below when adding a new derivative board. #### +########################################################## +config DEVICETREE + string + default "devicetree.cb" + +config MAINBOARD_PART_NUMBER + string + default "CN8100_SFF_EVB" + +endif |