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author | Furquan Shaikh <furquan@google.com> | 2018-10-05 11:04:01 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2018-10-10 20:21:43 +0000 |
commit | 99d258afcbb72c187c6aed6be3a0df6aac35722f (patch) | |
tree | 448e5c0f7bc55309051f75729015504ec706f005 /src/mainboard/cavium/cn8100_sff_evb/devicetree.cb | |
parent | d5325ddcc27535e13a224cb62759933186de0d39 (diff) | |
download | coreboot-99d258afcbb72c187c6aed6be3a0df6aac35722f.tar.xz |
soc/intel/skylake: Set PCIEXPWAK_DIS if WAKE# pin is not enabled
This change sets PCIEXPWAK_DIS in PM1_EN register if WAKE# pin is not
enabled on the platform. This is required to prevent unnecessary wakes
if the WAKE# pin remains not connected on the platform. Function to
set PCIEXPWAK_DIS gets called in normal boot path (BS_PAYLOAD_LOAD) as
well as S3 resume path (BS_OS_RESUME).
BUG=b:117284700
TEST=Verified that no spurious wakes are observed on nocturne.
Change-Id: Iea93baffc9bb703c0ffedacafc6a9a9410c7ebfe
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/28939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/cavium/cn8100_sff_evb/devicetree.cb')
0 files changed, 0 insertions, 0 deletions