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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-03-27 12:01:40 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2018-07-23 06:35:53 +0000 |
| commit | de4410c51fe5c5113643663644dd635c917a7ab2 (patch) | |
| tree | edb69d4a41c2d486ad684012deb711ebf8ee5a21 /src/mainboard/cavium | |
| parent | 367956d58e1446ec63169d9bc08426d519da754e (diff) | |
| download | coreboot-de4410c51fe5c5113643663644dd635c917a7ab2.tar.xz | |
soc/cavium: Apply additional devicetree fixups
Depends on Change-Id: I0f27b92a5e074966f893399eb401eb97d784850d
Apply additional devicetree fixes:
* Update SCLK from boot fuses
* Updated REFCLKUAA from UART ref clock divider settings
* Remove disabled PEM entries
* Remove phandle to disabled PEM entries
Fixes:
* Linux console wrong baud rate once the PL011 driver is started.
* thunderx-pem kernel module crash on disable PCIe ports.
Tested on Cavium SoC.
Change-Id: I7e8eefd913915a879dad28dfb7801a2018ed2985
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/mainboard/cavium')
0 files changed, 0 insertions, 0 deletions