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author | Felix Singer <felixsinger@posteo.net> | 2020-09-22 20:32:33 +0000 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-24 06:19:12 +0000 |
commit | da3375ed41b9967699679734e980bede69b3b12b (patch) | |
tree | 4538ac04ff08a41814b0e1c7c1f24a85862fe2dd /src/mainboard/clevo/l140cu/dsdt.asl | |
parent | 80835a10e150d671dba4e4ea75b50dbd0521c4f5 (diff) | |
download | coreboot-da3375ed41b9967699679734e980bede69b3b12b.tar.xz |
mb: Copy system76/lemp9 to clevo/l140cu
Copy system76/lemp9 to clevo/l140cu, since it's a Clevo notebook
actually and both have the same mainboard.
This commit is meant to create a working copy for clevo/l140cu. The only
changes are names. Further patches will follow to make this mainboard
more generic.
Since system76/lemp9 is based on System76's EC firmware, EC stuff does
not work correctly yet. This will be fixed in another patch.
Tested on TUXEDO InfinityBook S 14 v5 and PCZ Lafité Pro 14.
Change-Id: I7c2993256fd9123a8013df5ba8292ea1ead10f74
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/clevo/l140cu/dsdt.asl')
-rw-r--r-- | src/mainboard/clevo/l140cu/dsdt.asl | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/clevo/l140cu/dsdt.asl b/src/mainboard/clevo/l140cu/dsdt.asl new file mode 100644 index 0000000000..eac27b56f1 --- /dev/null +++ b/src/mainboard/clevo/l140cu/dsdt.asl @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 and up + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 // OEM revision +) +{ + #include <soc/intel/cannonlake/acpi/platform.asl> + #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> + #include <cpu/intel/common/acpi/cpu.asl> + + Device (\_SB.PCI0) + { + #include <soc/intel/common/block/acpi/acpi/northbridge.asl> + #include <soc/intel/cannonlake/acpi/southbridge.asl> + } + + #include <southbridge/intel/common/acpi/sleepstates.asl> + + Scope (\_SB.PCI0.LPCB) + { + #include <drivers/pc80/pc/ps2_controller.asl> + } + + #include "acpi/mainboard.asl" +} |