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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-17 19:33:19 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-19 11:21:12 +0000 |
| commit | 747a2fc90ea54167dbcd27f41927b5d1107ff961 (patch) | |
| tree | 55255a09e069f484bacfe4a9114a8e8c3f0ce6c8 /src/mainboard/clevo | |
| parent | 90ae08922d7f6fdc8b762cb7bc1e2d8d85807854 (diff) | |
| download | coreboot-747a2fc90ea54167dbcd27f41927b5d1107ff961.tar.xz | |
mb/{clevo/cml-u,system76/lemp9}: Clarify `gen2_dec` use
This I/O range is for a PM channel on the EC, not the PCH PMC.
Change-Id: I64422e537c1edcd0673cf87f16139fb117b10e75
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51604
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/clevo')
| -rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb index 4a93065e76..fed13258ce 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb +++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb @@ -189,7 +189,7 @@ chip soc/intel/cannonlake # LPC configuration from lspci -s 1f.0 -xxx # Address 0x84: Decode 0x80 - 0x8F (Port 80) register "gen1_dec" = "0x000c0081" - # Address 0x88: Decode 0x68 - 0x6F (PMC) + # Address 0x88: Decode 0x68 - 0x6F (EC PM channel) register "gen2_dec" = "0x00040069" # Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command) register "gen3_dec" = "0x00fc0e01" |