summaryrefslogtreecommitdiff
path: root/src/mainboard/compulab
diff options
context:
space:
mode:
authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-03-24 17:01:41 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-04-23 10:06:01 +0000
commitda9302a2c42038594ed0127b8887c7d984cd65e1 (patch)
treee6dee07cdc5ccf60da66ffaa86e855c961c8fd25 /src/mainboard/compulab
parent78fbe3d8319bc8fdf82b76378d29c6c902fd13e5 (diff)
downloadcoreboot-da9302a2c42038594ed0127b8887c7d984cd65e1.tar.xz
nb/intel/sandybridge: Drop pch.h from sandybridge.h
Include pch.h in the source files instead in sandybridge.h. Tested on Lenovo T520 (Intel Sandy Bridge). Still boots to OS, no errors visible in dmesg. Change-Id: I9e5b678e979a8d136d8d00b49486d0a882f77d81 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32065 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/compulab')
-rw-r--r--src/mainboard/compulab/intense_pc/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c
index dbd28c8aff..6d0b3af8c0 100644
--- a/src/mainboard/compulab/intense_pc/romstage.c
+++ b/src/mainboard/compulab/intense_pc/romstage.c
@@ -18,6 +18,7 @@
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <superio/smsc/sio1007/chip.h>
+#include <southbridge/intel/bd82x6x/pch.h>
#define SIO_PORT 0x164e