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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-03 01:27:23 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-14 14:15:12 +0100
commit93b600ded7aa847649a175b2a56f154e434fb10c (patch)
tree7d2c4cc1977aad38fea75e8434170fb36e4c7664 /src/mainboard/cubietech
parent601b5b530206d7d920036a4274954cc7a8beacd7 (diff)
downloadcoreboot-93b600ded7aa847649a175b2a56f154e434fb10c.tar.xz
cubieboard: Setup CPU clock in romstage and load ramstage
This completes the romstage for the cubieboard. Change-Id: If3272d8a9e414f782892bc41b34b5e2dece5d7e1 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4686 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/cubietech')
-rw-r--r--src/mainboard/cubietech/cubieboard/romstage.c28
1 files changed, 25 insertions, 3 deletions
diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c
index 1b4d886b2a..199842b317 100644
--- a/src/mainboard/cubietech/cubieboard/romstage.c
+++ b/src/mainboard/cubietech/cubieboard/romstage.c
@@ -1,10 +1,17 @@
/*
- * Placeholder for Cubieboard romstage
+ * Basic romstage for Cubieboard
+ *
+ * Set up system voltages, then increase the CPU clock, before turning control
+ * to ramstage. The CPU VDD needs to be properly set before it can run at full
+ * speed. Setting the CPU at full speed helps lzma-decompress ramstage a lot
+ * faster.
*
* Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* Subject to the GNU GPL v2, or (at your option) any later version.
*/
+#include <arch/stages.h>
+#include <cbfs.h>
#include <console/console.h>
#include <cpu/allwinner/a10/clock.h>
#include <cpu/allwinner/a10/gpio.h>
@@ -63,10 +70,25 @@ static enum cb_err cubieboard_setup_power(void)
void main(void)
{
+ void *entry;
+ enum cb_err err;
+
console_init();
- printk(BIOS_INFO, "You have managed to succesfully load romstage.\n");
/* Configure power rails */
- cubieboard_setup_power();
+ err = cubieboard_setup_power();
+
+ if (err == CB_SUCCESS) {
+ /* TODO: Get this clock from devicetree.cb */
+ a1x_set_cpu_clock(1008);
+ } else {
+ /* cubieboard_setup_power() prints more details */
+ printk(BIOS_WARNING, "Will run CPU at reduced speed\n");
+ a1x_set_cpu_clock(384);
+ }
+
+ entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
+ printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
+ stage_exit(entry);
}