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| author | Ronald G. Minnich <rminnich@gmail.com> | 2009-10-01 15:59:49 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-10-01 15:59:49 +0000 |
| commit | e3de8b7cb507bd463d9180ff6b4adb19d01b5761 (patch) | |
| tree | 5e2b98cc7ded34e2d751e4c8b391272d7bab9ab3 /src/mainboard/dell | |
| parent | 8a7ffd8dec6ee4f59e7b3edbee8b29328fb1d74d (diff) | |
| download | coreboot-e3de8b7cb507bd463d9180ff6b4adb19d01b5761.tar.xz | |
OK, this builds and even looks right. dell needs its own Makefile.inc because
it is a P4 and it needs SSE for romcc not to go into infinite loop.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/dell')
| -rw-r--r-- | src/mainboard/dell/s1850/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/dell/s1850/Makefile.inc | 43 |
2 files changed, 43 insertions, 1 deletions
diff --git a/src/mainboard/dell/s1850/Kconfig b/src/mainboard/dell/s1850/Kconfig index 545ec873f3..860915e2b8 100644 --- a/src/mainboard/dell/s1850/Kconfig +++ b/src/mainboard/dell/s1850/Kconfig @@ -4,6 +4,7 @@ config BOARD_DELL_S1850 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 select SOUTHBRIDGE_INTEL_I82801ER + select SOUTHBRIDGE_INTEL_PXHD select SUPERIO_NSC_PC8374 select PIRQ_TABLE help diff --git a/src/mainboard/dell/s1850/Makefile.inc b/src/mainboard/dell/s1850/Makefile.inc index caa81b8b4e..683a297807 100644 --- a/src/mainboard/dell/s1850/Makefile.inc +++ b/src/mainboard/dell/s1850/Makefile.inc @@ -18,5 +18,46 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -include $(src)/mainboard/Makefile.romccboard.inc +initobj-y += crt0.o +crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc +crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc +crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc +crt0-y += ../../../../src/arch/i386/lib/cpu_reset.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc +crt0-y += failover.inc +crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc +crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc +crt0-y += ../../../../src/cpu/x86/sse/enable_sse.inc +crt0-y += auto.inc +crt0-y += ../../../../src/cpu/x86/sse/disable_sse.inc +crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc + +ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb +ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds +ldscript-y += ../../../../src/cpu/x86/32bit/entry32.lds +ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds +ldscript-y += ../../../../src/arch/i386/lib/failover.lds + +driver-y += mainboard.o + +obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o +obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o + +ifdef POST_EVALUATION + +ROMCCFLAGS ?= -mcpu=p4 + +$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c + $(obj)/romcc $(ROMCCFLAGS) -O2 --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@ + +ifeq ($(CONFIG_HAVE_OPTION_TABLE),y) +$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h + $(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@ +else +$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c + $(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@ +endif + +endif |