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| author | Ronald G. Minnich <rminnich@gmail.com> | 2004-08-24 17:23:37 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2004-08-24 17:23:37 +0000 |
| commit | 0fb38825cb660f08acfc9b352aa52cc00101bc6e (patch) | |
| tree | 0c01d52a8b0c6dd22586f2fdceeaa73007c426b2 /src/mainboard/densitron/dpx114 | |
| parent | 182615d635343a33306320833b2606e1f966e35a (diff) | |
| download | coreboot-0fb38825cb660f08acfc9b352aa52cc00101bc6e.tar.xz | |
fixed up tables.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/densitron/dpx114')
| -rw-r--r-- | src/mainboard/densitron/dpx114/irq_tables.c | 40 |
1 files changed, 19 insertions, 21 deletions
diff --git a/src/mainboard/densitron/dpx114/irq_tables.c b/src/mainboard/densitron/dpx114/irq_tables.c index 894c27dec5..e0bfea4519 100644 --- a/src/mainboard/densitron/dpx114/irq_tables.c +++ b/src/mainboard/densitron/dpx114/irq_tables.c @@ -1,32 +1,30 @@ /* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) - Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up - - Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM + * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up + * + * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */ #include <arch/pirq_routing.h> const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*5, /* there can be total 5 devices on the bus */ - 0, /* Where the interrupt router lies (bus) */ - 0x88, /* Where the interrupt router lies (dev) */ - 0x1c20, /* IRQs devoted exclusively to PCI usage */ - 0x1106, /* Vendor */ - 0x8231, /* Device */ - 0, /* Crap (miniport) */ + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*5, /* there can be total 5 devices on the bus */ + 0x00, /* Where the interrupt router lies (bus) */ + (0x00<<3)|0x0, /* Where the interrupt router lies (dev) */ + 0x1ea0, /* IRQs devoted exclusively to PCI usage */ + 0, /* Vendor */ + 0, /* Device */ + 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + 0x15, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { - /* 8231 ethernet */ - {0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0}, - /* 8231 internal */ - {0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0}, - /* PCI slot */ - {0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0}, - {0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0}, - {0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0}, + /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + {0x00,(0x09<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x1, 0x0}, + {0x00,(0x0a<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x2, 0x0}, + {0x00,(0x0b<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x3, 0x0}, + {0x00,(0x0f<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, + {0x00,(0x02<<3)|0x0, {{0x59, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, } }; |