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authorRonald G. Minnich <rminnich@gmail.com>2004-09-30 16:37:22 +0000
committerRonald G. Minnich <rminnich@gmail.com>2004-09-30 16:37:22 +0000
commita4779e80c3e54e6e6c31169908803065b4ef68b2 (patch)
tree80dc6721ec07d14523e6ed3ee1af30013f869a6b /src/mainboard/digitallogic/adl855pc/Config.lb
parent2b763af4ca6541734ff7d36a16173f9606c248c9 (diff)
downloadcoreboot-a4779e80c3e54e6e6c31169908803065b4ef68b2.tar.xz
digital logic stuff, fixes for the smbus code in 82801dbm
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/digitallogic/adl855pc/Config.lb')
-rw-r--r--src/mainboard/digitallogic/adl855pc/Config.lb34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/Config.lb b/src/mainboard/digitallogic/adl855pc/Config.lb
index 237a1d957a..fb2ba53ba4 100644
--- a/src/mainboard/digitallogic/adl855pc/Config.lb
+++ b/src/mainboard/digitallogic/adl855pc/Config.lb
@@ -202,7 +202,9 @@ end
##
## Setup RAM
##
+mainboardinit cpu/p6/enable_mmx_sse.inc
mainboardinit ./auto.inc
+mainboardinit cpu/p6/disable_mmx_sse.inc
##
## Include the secondary Configuration files
@@ -224,6 +226,38 @@ northbridge intel/i855pm "i855pm"
# pci 0:12.0
register "enable_usb" = "0"
register "enable_native_ide" = "0"
+ register "enable_usb" = "0"
+ register "enable_native_ide" = "0"
+ superio winbond/w83627hf link 1
+ pnp 2e.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ pnp 2e.1 off # Parallel Port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ pnp 2e.2 on # Com1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ pnp 2e.3 off # Com2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ pnp 2e.5 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ pnp 2e.6 off # CIR
+ pnp 2e.7 off # GAME_MIDI_GIPO1
+ pnp 2e.8 off # GPIO2
+ pnp 2e.9 off # GPIO3
+ pnp 2e.a off # ACPI
+ pnp 2e.b on # HW Monitor
+ io 0x60 = 0x290
+ register "com1" = "{1}"
+ # register "com1" = "{1, 0, 0x3f8, 4}"
+ # register "lpt" = "{1}"
+ end
end
end