diff options
author | Ronald G. Minnich <rminnich@gmail.com> | 2007-05-05 03:54:13 +0000 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2007-05-05 03:54:13 +0000 |
commit | fa6c11eb40325f241c6a98300fa1dcfec90f8ca8 (patch) | |
tree | a391d19fa28e17ab2fca93178b73bd22257cb274 /src/mainboard/digitallogic/msm800sev/irq_tables.c | |
parent | 5ef8b0f62b5d222d575b6e6e314fc309d10488b5 (diff) | |
download | coreboot-fa6c11eb40325f241c6a98300fa1dcfec90f8ca8.tar.xz |
This is the final patch to enable the msm800sev to build. This patch
adds a symbol to the model_lx/cache_as_ram.inc, and modifies some
files in the mainboard directory. This patch has been tested but there
is a remaining problem which I am tracking down. Expect one more patch
to "get it all working".
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/digitallogic/msm800sev/irq_tables.c')
-rw-r--r-- | src/mainboard/digitallogic/msm800sev/irq_tables.c | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/src/mainboard/digitallogic/msm800sev/irq_tables.c b/src/mainboard/digitallogic/msm800sev/irq_tables.c index 4322e20e9b..9236e529e5 100644 --- a/src/mainboard/digitallogic/msm800sev/irq_tables.c +++ b/src/mainboard/digitallogic/msm800sev/irq_tables.c @@ -1,3 +1,4 @@ +#if 0 /* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up @@ -58,3 +59,107 @@ unsigned long write_pirq_routing_table(unsigned long addr) { return copy_pirq_routing_table(addr); } +#endif +/* +* This file is part of the LinuxBIOS project. +* +* Copyright (C) 2007 Advanced Micro Devices +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include <arch/pirq_routing.h> +#include <console/console.h> +#include <arch/io.h> +#include <arch/pirq_routing.h> +#include "../../../southbridge/amd/cs5536/cs5536.h" + +/* Platform IRQs */ +#define PIRQA 11 +#define PIRQB 5 +#define PIRQC 10 +#define PIRQD 10 + +/* Map */ +#define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */ +#define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */ +#define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */ +#define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */ + +/* Link */ +#define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */ +#define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */ +#define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */ +#define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */ + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*IRQ_SLOT_COUNT, /* there can be total 6 devices on the bus */ + 0x00, /* Where the interrupt router lies (bus) */ + (0x0F<<3)|0x0, /* Where the interrupt router lies (dev) */ + 0x00, /* IRQs devoted exclusively to PCI usage */ + 0x100B, /* Vendor */ + 0x002B, /* Device */ + 0, /* Crap (miniport) */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0x00, /* u8 checksum , this has to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + { + /* If you change the number of entries, change the IRQ_SLOT_COUNT above! */ + /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + {0x00,(0x01<<3)|0x0, {{L_PIRQA, M_PIRQA}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, /* cpu */ + {0x00,(0x0F<<3)|0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x0, 0x0}, /* chipset */ + {0x00,(0x0C<<3)|0x0, {{L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}}, 0x1, 0x0}, /* slot1 */ + {0x00,(0x0D<<3)|0x0, {{L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}}, 0x2, 0x0}, /* slot2 */ + {0x00,(0x0A<<3)|0x0, {{L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}}, 0x3, 0x0}, /* slot3 */ + {0x00,(0x0B<<3)|0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x4, 0x0}, /* slot4 */ + } +}; + + + +unsigned long write_pirq_routing_table(unsigned long addr){ + int i, j, k, num_entries; + unsigned int pirq[4]; + uint16_t chipset_irq_map; + uint32_t pciAddr, pirtable_end; + struct irq_routing_table *pirq_tbl; + + pirtable_end = copy_pirq_routing_table(addr); + + /* Set up chipset IRQ steering */ + pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; + chipset_irq_map = (PIRQD << 12 | PIRQC << 8 | PIRQB << 4 | PIRQA); + printk_debug("%s(%08X, %04X)\n", __FUNCTION__, pciAddr, chipset_irq_map); + outl(pciAddr & ~3, 0xCF8); + outl(chipset_irq_map, 0xCFC); + + pirq_tbl = (struct irq_routing_table *)(addr); + num_entries = (pirq_tbl->size - 32)/16; + + /* Set PCI IRQs */ + for (i=0; i < num_entries; i++){ + printk_debug("PIR Entry %d Dev/Fn: %X Slot: %d\n", i, pirq_tbl->slots[i].devfn, pirq_tbl->slots[i].slot); + for (j = 0; j < 4; j++){ + printk_debug("INT: %c bitmap: %x ", 'A'+j, pirq_tbl->slots[i].irq[j].bitmap); + for (k = 0; (!((pirq_tbl->slots[i].irq[j].bitmap >> k) & 1)) && (pirq_tbl->slots[i].irq[j].bitmap != 0); k++); /* finds lsb in bitmap to IRQ# */ + pirq[j] = k; + printk_debug("PIRQ: %d\n", k); + } + pci_assign_irqs(pirq_tbl->slots[i].bus, pirq_tbl->slots[i].devfn, pirq); /* bus, device, slots IRQs for {A,B,C,D} */ + } + + /* put the PIR table in memory and checksum */ + return pirtable_end; +}
\ No newline at end of file |