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author | Kane Chen <kane.chen@intel.com> | 2014-10-01 13:22:52 +0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-03-09 03:33:52 +0100 |
commit | 9604474d4cdd8577807d86b04892f60598905abf (patch) | |
tree | 1bc426cc0606d87efb03338087ce958148bde0fa /src/mainboard/digitallogic | |
parent | 18cb1340f185150b9708257ba8024b6900706083 (diff) | |
download | coreboot-9604474d4cdd8577807d86b04892f60598905abf.tar.xz |
broadwell: enable PCIe endpoint CLK power management
BUG=chrome-os-partner:31424
BRANCH=none
TEST=build only, due to I don't have broadwell system with wifi to test
need somebody help me to verify
Change-Id: I52360176e135ea7f01cc67a926be4870265f57d1
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/220743
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/8448
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/digitallogic')
0 files changed, 0 insertions, 0 deletions