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authorDavid Hendricks <dhendrix@chromium.org>2013-06-15 19:22:06 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 21:50:23 +0200
commiteb9517cce9dfdc042ca1a9a2d7f6dd14d6d4fafc (patch)
tree35a8c86a5679cf0688fc2d84ac7ae4788f22f342 /src/mainboard/digitallogic
parentff7c8e82d10a48f7d123755b33bef9ffbf01d90d (diff)
downloadcoreboot-eb9517cce9dfdc042ca1a9a2d7f6dd14d6d4fafc.tar.xz
exynos5420: add I2C8-10 to clock_get_periph_rate()
This adds entries for I2C8-10 to giant switch statement in clock_get_periph_rate(). It also eliminates the I2C peripheral's usage of clk_bit_info since it's confusing and error-prone. Change-Id: I30dfc4c9a03fbf16d08e44e074189fb9021edb6d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3676 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/digitallogic')
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