diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-04 17:15:39 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-04 17:15:39 +0000 |
| commit | 70b0cf23ce18371be96062476e4fdc88d4930683 (patch) | |
| tree | b1a0cef621a4c98d538c4e3a573ae3a5a522a99a /src/mainboard/eaglelion/5bcm/Kconfig | |
| parent | 5bb10282e978dd811246c921a16e535babfbac9a (diff) | |
| download | coreboot-70b0cf23ce18371be96062476e4fdc88d4930683.tar.xz | |
Add initial kconfig support for all AMD GX1 boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/eaglelion/5bcm/Kconfig')
| -rw-r--r-- | src/mainboard/eaglelion/5bcm/Kconfig | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/eaglelion/5bcm/Kconfig b/src/mainboard/eaglelion/5bcm/Kconfig new file mode 100644 index 0000000000..04f05dd4ff --- /dev/null +++ b/src/mainboard/eaglelion/5bcm/Kconfig @@ -0,0 +1,52 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config BOARD_EAGLELION_5BCM + bool "5BCM" + select ARCH_X86 + select CPU_AMD_GX1 + select NORTHBRIDGE_AMD_GX1 + select SOUTHBRIDGE_AMD_CS5530 + select SUPERIO_NSC_PC97317 + select HAVE_PIRQ_TABLE + select PIRQ_ROUTE + select UDELAY_TSC + select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 + +config MAINBOARD_DIR + string + default eaglelion/5bcm + depends on BOARD_EAGLELION_5BCM + +config MAINBOARD_PART_NUMBER + string + default "5BCM" + depends on BOARD_EAGLELION_5BCM + +config HAVE_OPTION_TABLE + bool + default n + depends on BOARD_EAGLELION_5BCM + +config IRQ_SLOT_COUNT + int + default 2 + depends on BOARD_EAGLELION_5BCM + |