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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-04-19 21:33:40 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2011-04-19 21:33:40 +0000 |
commit | 13508b94cba913b94ba9afc8dc3d97313140152d (patch) | |
tree | 1132ecf08645d5a469b3975c35632a084913e0bd /src/mainboard/eaglelion | |
parent | 4fff74b69f9c1ad7f835e6545a71631c34a4ab09 (diff) | |
download | coreboot-13508b94cba913b94ba9afc8dc3d97313140152d.tar.xz |
Drop baud rate init to an arbitrary baud rate from Super I/O code.
See discussion at
http://www.mail-archive.com/coreboot@coreboot.org/msg29394.html
config->com1, devicetree.cb cleanup and init_uart8250() removal
will follow once this patch is comitted
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Updated to drop com1, com2.... from config structure and devicetree.cb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/eaglelion')
-rw-r--r-- | src/mainboard/eaglelion/5bcm/devicetree.cb | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/eaglelion/5bcm/devicetree.cb b/src/mainboard/eaglelion/5bcm/devicetree.cb index 7e55bca54d..a08ffd4e3d 100644 --- a/src/mainboard/eaglelion/5bcm/devicetree.cb +++ b/src/mainboard/eaglelion/5bcm/devicetree.cb @@ -36,8 +36,6 @@ chip northbridge/amd/gx1 device pnp 2e.8 on # Power Management io 0x60 = 0xe800 end - register "com1" = "{115200}" - register "com2" = "{38400}" end device pci 12.1 off end # SMI device pci 12.2 on end # IDE |