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authorMyles Watson <mylesgw@gmail.com>2009-06-19 21:18:14 +0000
committerMyles Watson <mylesgw@gmail.com>2009-06-19 21:18:14 +0000
commitf17f647a62427e7241c6cbee0a81be5a46072cd9 (patch)
tree4c8b4ab76ce6b796d8c2318c5ab176dfd496456f /src/mainboard/embeddedplanet
parent24fbb7d66f6938b942e4481d2821023fbb7cd467 (diff)
downloadcoreboot-f17f647a62427e7241c6cbee0a81be5a46072cd9.tar.xz
Undo my ugly commit that added uses clauses in lots of places instead of one.
Fix configuration of all boards. (Abuild tested) Hopefully fix compilation of PPC boards (they've never compiled for me.) Apologize profusely. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/embeddedplanet')
-rw-r--r--src/mainboard/embeddedplanet/ep405pc/Options.lb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/embeddedplanet/ep405pc/Options.lb b/src/mainboard/embeddedplanet/ep405pc/Options.lb
index 11491508d2..7aabc4f252 100644
--- a/src/mainboard/embeddedplanet/ep405pc/Options.lb
+++ b/src/mainboard/embeddedplanet/ep405pc/Options.lb
@@ -4,6 +4,7 @@
uses PCIC0_CFGADDR
uses CONFIG_CBFS
+uses CONFIG_ARCH_X86
uses PCIC0_CFGDATA
uses ISA_IO_BASE
uses ISA_MEM_BASE
@@ -75,6 +76,7 @@ default TTYS0_BASE=0xef600300-ISA_IO_BASE
## Enable PPC405 instructions
default CPU_OPT="-mcpu=405"
#default CPU_OPT=""
+default CONFIG_ARCH_X86=0
## Use stage 1 initialization code
default CONFIG_USE_INIT=1