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authorHung-Te Lin <hungte@chromium.org>2013-02-12 00:07:38 +0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-12 03:02:45 +0100
commit7635a60ca848b50ff4a0ac85a667adc7151a5abf (patch)
tree42d7db8bd1c1bcacd5d1c4d2b70ca0b8ad3a6da5 /src/mainboard/emulation/qemu-armv7/romstage.c
parentbc64cae995ddab369289e19b41501df5dbc58751 (diff)
downloadcoreboot-7635a60ca848b50ff4a0ac85a667adc7151a5abf.tar.xz
armv7: Add emulation/qemu-armv7 board.
To simplify testing ARM implementation, we need a QEMU configuration for ARM. The qemu-armv7 provides serial output, CBFS simulation, and full boot path (bootblock, romstage, ramstage) to verify the boot loader functionality. To run with QEMU: export QEMU_AUDIO_DRV=none qemu-system-arm -M vexpress-a9 -m 1024M -nographic -kernel build/coreboot.rom Verified to boot until ramstage loaded successfully by QEMU v1.0.50. Change-Id: I1f23ffaf408199811a0756236821c7e0f2a85004 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2354 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-armv7/romstage.c')
-rw-r--r--src/mainboard/emulation/qemu-armv7/romstage.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-armv7/romstage.c b/src/mainboard/emulation/qemu-armv7/romstage.c
new file mode 100644
index 0000000000..81f62b6b83
--- /dev/null
+++ b/src/mainboard/emulation/qemu-armv7/romstage.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cbfs.h>
+#include <common.h>
+#include <console/console.h>
+#include <arch/stages.h>
+
+void main(void)
+{
+ void *entry;
+ console_init();
+ printk(BIOS_INFO, "hello from romstage\n");
+
+ entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
+ printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
+
+ stage_exit(entry);
+}