diff options
author | Patrick Rudolph <siro@das-labor.org> | 2018-11-11 12:50:51 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-12 15:57:34 +0000 |
commit | 1af89237094246216c6f60d77d74690a39907999 (patch) | |
tree | 20c369514e4a340ed33199c0eb8c95adfa577c94 /src/mainboard/emulation/qemu-q35/romstage.c | |
parent | 7665aefb0ad216ee76307193b849834eac7b1f88 (diff) | |
download | coreboot-1af89237094246216c6f60d77d74690a39907999.tar.xz |
mb/emulation/qemu-i440fx|q35: Switch to C_ENVIRONMENT_BOOTBLOCK
Useful for testing stuff in C_ENVIRONMENT_BOOTBLOCK, like
VBOOT with separate verstage.
Changes:
* Use symbols to set up CAR and STACK
* Zero CAR area
* Move BIST failure checking to cpu folder
* Rename functions where necessary
Tested:
* qemu-2.11.2 machine pc
* qemu-2.11.2 machine q35
Test result:
* BIST error reporting is still working.
* Console starts in bootblock
* SeaBios 1.11.2 as payload is still working
Change-Id: Ibf341002c36d868b9b44c8b37381fa78ae5c4381
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/29578
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-q35/romstage.c')
-rw-r--r-- | src/mainboard/emulation/qemu-q35/romstage.c | 24 |
1 files changed, 6 insertions, 18 deletions
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index deb94af777..2b8d9351c0 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2004 Stefan Reinauer + * Copyright (C) 2018 Patrick Rudolph <siro@das-labor.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,32 +17,19 @@ #include <stdint.h> #include <cbmem.h> #include <console/console.h> -#include <southbridge/intel/i82801ix/i82801ix.h> -#include <cpu/x86/bist.h> #include <cpu/intel/romstage.h> #include <timestamp.h> -#include <delay.h> -#include <cpu/x86/lapic.h> - +#include <southbridge/intel/i82801ix/i82801ix.h> +#include <program_loading.h> -void * asmlinkage romstage_main(unsigned long bist) +asmlinkage void car_stage_entry(void) { - int cbmem_was_initted; - - /* init_timer(); */ - post_code(0x05); - i82801ix_early_init(); console_init(); - /* Halt if there was a built in self test failure */ - report_bist_failure(bist); - - cbmem_was_initted = !cbmem_recovery(0); + cbmem_recovery(0); - timestamp_init(timestamp_get()); timestamp_add_now(TS_START_ROMSTAGE); - /* Emulation uses fixed low stack during ramstage. */ - return NULL; + run_ramstage(); } |