diff options
author | Duncan Laurie <dlaurie@google.com> | 2020-03-17 18:54:39 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-31 10:47:26 +0000 |
commit | 14cf3245fe0a3ff362712527492328a9fe055c6f (patch) | |
tree | cc7cc1bf14d2b69948103656071bea3ddeaa1f53 /src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd | |
parent | 516967c681a1cadfb053d8f4c098826eca743131 (diff) | |
download | coreboot-14cf3245fe0a3ff362712527492328a9fe055c6f.tar.xz |
mb/emulation/qemu-q35: Enable CHROMEOS as an option
Allow Chrome OS to be enabled for this QEMU target. By default
this does not change anything unless it is selected in the build
configuration, but it makes it possible.
Native VGA init is not forced when Chrome OS is enabled because the
drm-bochs driver does not work with chrome (even the latest upstream
kernel driver with drm atomic support) but it does work with virtio.
The coreboot graphics init needs to match what is selected with qemu
(with -vga std or -vga virtio) which in turn will determine which
kernel driver is used.
A second FMAP is added with both RW-A and RW-B regions which is
required by chromeos.
Recovery mode can be entered by supplying a custom fw_cfg option
when launching qemu: -fw_cfg name=opt/cros/recovery,string=1
Change-Id: I24b4532ea961e68558663292c99d121f0a30ce3b
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd')
-rw-r--r-- | src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd b/src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd new file mode 100644 index 0000000000..fcbfa95b69 --- /dev/null +++ b/src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd @@ -0,0 +1,28 @@ +FLASH@0xff000000 0x1000000 { + SI_BIOS 0x1000000 { + RW_SECTION_A 0x1c0000 { + VBLOCK_A 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + RW_SECTION_B 0x1c0000 { + VBLOCK_B 0x10000 + FW_MAIN_B(CBFS) + RW_FWID_B 0x40 + } + RW_SHARED 0x4000 { + SHARED_DATA 0x2000 + VBLOCK_DEV 0x2000 + } + RW_VPD(PRESERVE) 0x1000 + RW_LEGACY(CBFS) 0x10000 + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + RO_VPD(PRESERVE) 0x1000 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} |