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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-07-05 19:41:24 +0200
committerMartin Roth <martinroth@google.com>2019-08-03 17:19:17 +0000
commit871d2c74a22a915f8ca31c38b5170029963f62ac (patch)
treea350f42c156197c3dfbd09e1a15862da98b00a0d /src/mainboard/emulation/qemu-riscv
parenta6f9eab44ab0590ca7da33da0b042a8fce8da0f1 (diff)
downloadcoreboot-871d2c74a22a915f8ca31c38b5170029963f62ac.tar.xz
mb/emulation/qemu-riscv: Add opensbi support
Tested on qemu-riscv: Boots into Linux until initrd should be loaded. Change-Id: I4aa307c91d37703ad16643e7f8eb7925dede71a8 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-riscv')
-rw-r--r--src/mainboard/emulation/qemu-riscv/Kconfig23
-rw-r--r--src/mainboard/emulation/qemu-riscv/memlayout.ld3
2 files changed, 26 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig
index f0f658d0d9..fa6dccc94c 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig
+++ b/src/mainboard/emulation/qemu-riscv/Kconfig
@@ -40,6 +40,7 @@ config BOARD_SPECIFIC_OPTIONS
select BOOT_DEVICE_NOT_SPI_FLASH
select MISSING_BOARD_RESET
select DRIVERS_UART_8250MEM
+ select RISCV_HAS_OPENSBI
config MAINBOARD_DIR
string
@@ -57,4 +58,26 @@ config DRAM_SIZE_MB
int
default 32768
+config OPENSBI_PLATFORM
+ string
+ default "qemu/virt"
+
+# ugly, but CBFS is placed in DRAM...
+config OPENSBI_TEXT_START
+ hex
+ default 0x80010000 if COREBOOT_ROMSIZE_KB_64
+ default 0x80020000 if COREBOOT_ROMSIZE_KB_128
+ default 0x80040000 if COREBOOT_ROMSIZE_KB_256
+ default 0x80080000 if COREBOOT_ROMSIZE_KB_512
+ default 0x80100000 if COREBOOT_ROMSIZE_KB_1024
+ default 0x80200000 if COREBOOT_ROMSIZE_KB_2048
+ default 0x80400000 if COREBOOT_ROMSIZE_KB_4096
+ default 0x80600000 if COREBOOT_ROMSIZE_KB_6144
+ default 0x80800000 if COREBOOT_ROMSIZE_KB_8192
+ default 0x80a00000 if COREBOOT_ROMSIZE_KB_10240
+ default 0x80c00000 if COREBOOT_ROMSIZE_KB_12288
+ default 0x81000000 if COREBOOT_ROMSIZE_KB_16384
+ default 0x82000000 if COREBOOT_ROMSIZE_KB_32768
+ default 0x84000000 if COREBOOT_ROMSIZE_KB_65536
+
endif # BOARD_EMULATION_QEMU_RISCV
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 2166d23f31..b29bc14fa9 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -33,6 +33,9 @@ SECTIONS
#if ENV_ROMSTAGE
ROMSTAGE(STAGES_START, 128K)
#endif
+#if ENV_RAMSTAGE
+ REGION(opensbi, STAGES_START, 128K, 4K)
+#endif
PRERAM_CBMEM_CONSOLE(STAGES_START + 128K, 8K)
RAMSTAGE(STAGES_START + 200K, 16M)
STACK(STAGES_START + 200K + 16M, 4K)