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authorPatrick Georgi <patrick@georgi-clan.de>2012-02-16 18:43:25 +0100
committerPatrick Georgi <patrick@georgi-clan.de>2012-03-08 15:39:05 +0100
commitc8feeddf343e8fd0ddd6be7e42101ab4f1866ed0 (patch)
tree74cd4b04d7b966561334b6482c653d09aa9b3eb7 /src/mainboard/emulation/qemu-x86
parent91162705a65e87c56d9fc58edfe597140d1b4d53 (diff)
downloadcoreboot-c8feeddf343e8fd0ddd6be7e42101ab4f1866ed0.tar.xz
Unify Local APIC address definitions
We used several names for that same value, and hardcoded the value at some more places. They're all LOCAL_APIC_ADDR now (except for lapic specific code that still uses LAPIC_DEFAULT_BASE). Change-Id: I1d4be73b1984f22b7e84681edfadf0588a7589b6 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/676 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/emulation/qemu-x86')
-rw-r--r--src/mainboard/emulation/qemu-x86/northbridge.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c
index 3f2243786d..b961e8b60c 100644
--- a/src/mainboard/emulation/qemu-x86/northbridge.c
+++ b/src/mainboard/emulation/qemu-x86/northbridge.c
@@ -1,4 +1,5 @@
#include <console/console.h>
+#include <cpu/x86/lapic_def.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <stdint.h>
@@ -80,7 +81,7 @@ static void cpu_pci_domain_read_resources(struct device *dev)
/* Reserve space for the LAPIC. There's one in every processor, but
* the space only needs to be reserved once, so we do it here. */
res = new_resource(dev, 3);
- res->base = 0xfee00000UL;
+ res->base = LOCAL_APIC_ADDR;
res->size = 0x10000UL;
res->limit = 0xffffffffUL;
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |