diff options
| author | Philipp Hug <philipp@hug.cx> | 2019-09-04 09:24:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-06 15:09:48 +0000 |
| commit | 934ae21b52492c9c730dc5accd2900b32c5c1492 (patch) | |
| tree | e8fecc91580592ac857326077ce9c486e31af017 /src/mainboard/emulation/spike-riscv/Makefile.inc | |
| parent | 8cb5ea7879cf82b79ab9a2c4342c542a167943bf (diff) | |
| download | coreboot-934ae21b52492c9c730dc5accd2900b32c5c1492.tar.xz | |
mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.
TEST=Set MAX_CPUS=2 and run qemu with -smp 2
Signed-off-by: Philipp Hug <philipp@hug.cx>
Change-Id: I94fb25fad103e3cb5db676eb4caead11d54ae0ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xiang Wang <merle@hardenedlinux.org>
Diffstat (limited to 'src/mainboard/emulation/spike-riscv/Makefile.inc')
| -rw-r--r-- | src/mainboard/emulation/spike-riscv/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/emulation/spike-riscv/Makefile.inc b/src/mainboard/emulation/spike-riscv/Makefile.inc index 38977b6345..bfeaf58867 100644 --- a/src/mainboard/emulation/spike-riscv/Makefile.inc +++ b/src/mainboard/emulation/spike-riscv/Makefile.inc @@ -18,6 +18,7 @@ bootblock-y += clint.c romstage-y += romstage.c romstage-y += uart.c romstage-y += rom_media.c +romstage-y += clint.c ramstage-y += uart.c ramstage-y += rom_media.c ramstage-y += clint.c |