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| author | Bill XIE <persmule@gmail.com> | 2019-02-27 13:22:33 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-17 08:18:54 +0000 |
| commit | 0ffdeef681f5f17b1aa66d9b99f5501089ea7b1a (patch) | |
| tree | e75c98e32fff114692aab0630a8f97ecba34eb80 /src/mainboard/emulation/spike-riscv/uart.c | |
| parent | eb5fa79723affe6d95dd4b2d56d6205bf396b6ef (diff) | |
| download | coreboot-0ffdeef681f5f17b1aa66d9b99f5501089ea7b1a.tar.xz | |
mb/lenovo/t430s: Open PCIe port #5 for Thunderbolt controller
Some T430s variants have a Thunderbolt controller wired to PCIe port
The controller hotplugs itself to the chipset when a downstream device
is hotplugged into it, so the hotplug capability should be enabled on
PCIe port #5.
TODO: find the correct gpio pin to detect the Thunderbolt controller
at runtime.
There are 3 variants of mainboard for Thinkpad T430s: Basic type
(Wistron LSN-4 11263-1), Boards with an additional discreet GPU,
Boards with an additional TB controller (Wistron LSN-4 11271-1),
each of which has a different schematic.
The gpio27 on the last type is set as set as GPIO-INPUT, compared
with GPIO-OUTPUT-HIGH on the basic type boards.
Change-Id: I61f41db100f398069e50e2da8a378b3a8d1c84bf
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31631
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/emulation/spike-riscv/uart.c')
0 files changed, 0 insertions, 0 deletions