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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2016-04-26 16:40:55 +0200
committerMartin Roth <martinroth@google.com>2016-04-28 19:19:27 +0200
commit8f407f695ec9fa2aa52e3685a8f225f03dfecc1d (patch)
treeccae5afa4831052d0a3fb7933a9dfd7d34129f85 /src/mainboard/emulation/spike-riscv
parentd6d50099e04d3b0840f0736e15d37eecfd9c5261 (diff)
downloadcoreboot-8f407f695ec9fa2aa52e3685a8f225f03dfecc1d.tar.xz
Add board URLs for the RISC-V boards
Change-Id: Ifdf40986c2407d8c5b0097654b42e056f4498d39 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14518 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/emulation/spike-riscv')
-rw-r--r--src/mainboard/emulation/spike-riscv/board_info.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/emulation/spike-riscv/board_info.txt b/src/mainboard/emulation/spike-riscv/board_info.txt
index a1d11f958e..37a0ae9cb7 100644
--- a/src/mainboard/emulation/spike-riscv/board_info.txt
+++ b/src/mainboard/emulation/spike-riscv/board_info.txt
@@ -1,2 +1,3 @@
Board name: Spike RISCV
Category: emulation
+Board URL: https://github.com/riscv/riscv-isa-sim