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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-06-10 19:35:15 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-12 12:41:48 +0200 |
| commit | f934efc9f8e2fe0791f47e7088301199629827b1 (patch) | |
| tree | 55c71ccea64a053f59e96d81baf307a225d77045 /src/mainboard/emulation/spike-riscv | |
| parent | a9067c6ec0b4a197d6eaa7ef3ab24c7b9e1e3826 (diff) | |
| download | coreboot-f934efc9f8e2fe0791f47e7088301199629827b1.tar.xz | |
arch/riscv: Add misc.c to bootblock/romstage to get udelay()
The uart8250mem driver needs it.
Change-Id: I09e6a17cedf8a4045f008f5a0d225055d745e8db
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15147
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/emulation/spike-riscv')
0 files changed, 0 insertions, 0 deletions