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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-11-30 00:06:51 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-05 13:36:26 +0000
commit042772a6bd66cd09add08da40785406e34e92d0a (patch)
treec3997c7d1acee6ddb9bf526ab0ef649527b71141 /src/mainboard/emulation
parent0688ab8d95f18f718510cc17aeb01a47519a9a5a (diff)
downloadcoreboot-042772a6bd66cd09add08da40785406e34e92d0a.tar.xz
mb/emulation/spike-riscv: Implement mtime_init
This patch lets spike boot to "Payload not loaded" again. Because soc/ucb/riscv/ does not represent a real SoC, but is a dummy directory for emulators, and different emulators might have different memory maps, I moved mtime_init to the mainboard-specific directories for Spike and QEMU. Change-Id: I080f7f81df752e25478bd277637bf894bbee4cb2 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/28873 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx>
Diffstat (limited to 'src/mainboard/emulation')
-rw-r--r--src/mainboard/emulation/qemu-riscv/Makefile.inc4
-rw-r--r--src/mainboard/emulation/qemu-riscv/mtime.c22
-rw-r--r--src/mainboard/emulation/spike-riscv/Makefile.inc2
-rw-r--r--src/mainboard/emulation/spike-riscv/clint.c26
4 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-riscv/Makefile.inc b/src/mainboard/emulation/qemu-riscv/Makefile.inc
index 36f1fca58c..1d882acc63 100644
--- a/src/mainboard/emulation/qemu-riscv/Makefile.inc
+++ b/src/mainboard/emulation/qemu-riscv/Makefile.inc
@@ -14,11 +14,15 @@
bootblock-y += uart.c
bootblock-y += rom_media.c
+bootblock-y += mtime.c
+
romstage-y += romstage.c
romstage-y += uart.c
romstage-y += rom_media.c
+
ramstage-y += uart.c
ramstage-y += rom_media.c
+ramstage-y += mtime.c
bootblock-y += memlayout.ld
romstage-y += memlayout.ld
diff --git a/src/mainboard/emulation/qemu-riscv/mtime.c b/src/mainboard/emulation/qemu-riscv/mtime.c
new file mode 100644
index 0000000000..f8c2717563
--- /dev/null
+++ b/src/mainboard/emulation/qemu-riscv/mtime.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 HardenedLinux
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mcall.h>
+
+/* FIXME: This is an empty implementation, please improve */
+/* This function is used to initialize HLS()->time/HLS()->timecmp */
+void mtime_init(void)
+{
+}
diff --git a/src/mainboard/emulation/spike-riscv/Makefile.inc b/src/mainboard/emulation/spike-riscv/Makefile.inc
index 36f1fca58c..38977b6345 100644
--- a/src/mainboard/emulation/spike-riscv/Makefile.inc
+++ b/src/mainboard/emulation/spike-riscv/Makefile.inc
@@ -14,11 +14,13 @@
bootblock-y += uart.c
bootblock-y += rom_media.c
+bootblock-y += clint.c
romstage-y += romstage.c
romstage-y += uart.c
romstage-y += rom_media.c
ramstage-y += uart.c
ramstage-y += rom_media.c
+ramstage-y += clint.c
bootblock-y += memlayout.ld
romstage-y += memlayout.ld
diff --git a/src/mainboard/emulation/spike-riscv/clint.c b/src/mainboard/emulation/spike-riscv/clint.c
new file mode 100644
index 0000000000..7ad3f5a7af
--- /dev/null
+++ b/src/mainboard/emulation/spike-riscv/clint.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 HardenedLinux
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <mcall.h>
+
+#define SPIKE_CLINT_BASE 0x02000000
+
+/* This function is used to initialize HLS()->time/HLS()->timecmp */
+void mtime_init(void)
+{
+ long hart_id = read_csr(mhartid);
+ HLS()->time = (uint64_t *)(SPIKE_CLINT_BASE + 0xbff8);
+ HLS()->timecmp = (uint64_t *)(SPIKE_CLINT_BASE + 0x4000 + 8 * hart_id);
+}