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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-07-29 22:35:45 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-07-30 11:48:33 +0200 |
| commit | 0dd5e4395e805e3d54b31f3eaf8b432af5bad5e2 (patch) | |
| tree | a00393bfae65738218fc402df8a20c0100112fd5 /src/mainboard/emulation | |
| parent | 8e89847af41656f82226e755f03fdcc178d3ef78 (diff) | |
| download | coreboot-0dd5e4395e805e3d54b31f3eaf8b432af5bad5e2.tar.xz | |
i82801ix: Allow configuration of SATA mode in CMOS.
Change-Id: Ice0f0273b16a946143c038a90b61978269c1c56e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6409
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/emulation')
| -rw-r--r-- | src/mainboard/emulation/qemu-q35/devicetree.cb | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/emulation/qemu-q35/devicetree.cb b/src/mainboard/emulation/qemu-q35/devicetree.cb index 1ac55a04a4..671a2d631d 100644 --- a/src/mainboard/emulation/qemu-q35/devicetree.cb +++ b/src/mainboard/emulation/qemu-q35/devicetree.cb @@ -7,8 +7,6 @@ chip mainboard/emulation/qemu-q35 device domain 0 on device pci 0.0 on end # northbridge (q35) chip southbridge/intel/i82801ix - register "sata_ahci" = "1" - # present unconditionally device pci 1f.0 on end # LPC device pci 1f.2 on end # SATA |