mb/facebook/fbg1701: separate cpld support

Move all code involving the cpld to a single file.
Rename mainboard_read_pcb_version() to cpld_read_pcb_version().

BUG=N/A
TEST=tested on fbg1701 board

Change-Id: I9ee9a2c605e8b63baa7d64af92f45aa07e0d9d9e
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36095
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 39 insertions, 0 deletions

diff --git a/src/mainboard/facebook/fbg1701/cpld.c b/src/mainboard/facebook/fbg1701/cpld.c
new file mode 100644
index 0000000000..7d1117f6ad
--- /dev/null
+++ b/src/mainboard/facebook/fbg1701/cpld.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2019 Eltan B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include "cpld.h"
+
+/* CPLD definitions */
+#define CPLD_PCB_VERSION_PORT 0x283
+#define CPLD_PCB_VERSION_MASK 0xF0
+#define CPLD_PCB_VERSION_BIT 4
+
+#define CPLD_RESET_PORT 0x287
+#define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20
+#define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00
+
+/* Reset DSI bridge */
+void cpld_reset_bridge(void)
+{
+	outb(CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE, CPLD_RESET_PORT);
+	outb(CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE, CPLD_RESET_PORT);
+}
+
+/* Read PCB version */
+unsigned int cpld_read_pcb_version(void)
+{
+	return ((inb(CPLD_PCB_VERSION_PORT) & CPLD_PCB_VERSION_MASK) >> CPLD_PCB_VERSION_BIT);
+}