summaryrefslogtreecommitdiff
path: root/src/mainboard/facebook/fbg1701
diff options
context:
space:
mode:
authorFrans Hendriks <fhendriks@eltan.com>2019-06-24 08:57:56 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-06-25 11:10:07 +0000
commit8b040c07309fbffe64b2695e111f724a4e979882 (patch)
tree66bc8797e858afc366102bda8e765093955a5ec8 /src/mainboard/facebook/fbg1701
parentbc15cc3e86a7b2a1b5dd8b46443b9a859beeba93 (diff)
downloadcoreboot-8b040c07309fbffe64b2695e111f724a4e979882.tar.xz
mainboard/facebook/fbg1701: Use LCD Panel type for name of tables
tc348860_table contains the eDP to MIPI Bridge controller type. b101uan08_table used the LCD Panel type. Use LCD Panel type for name of tables. Remove the incomplete resolution comments and specify the resolution at the start of the table to 1200x1920. BUG=N/A TEST=Config eDP and verify LCD panels are working on Facebook FBG-1701 Change-Id: Ic152ea1f95f155ab76638b57a259d37ce6f43037 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33736 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/facebook/fbg1701')
-rw-r--r--src/mainboard/facebook/fbg1701/ramstage.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/facebook/fbg1701/ramstage.c b/src/mainboard/facebook/fbg1701/ramstage.c
index 3903a6474e..5c78bccac5 100644
--- a/src/mainboard/facebook/fbg1701/ramstage.c
+++ b/src/mainboard/facebook/fbg1701/ramstage.c
@@ -28,8 +28,8 @@ struct edp_data {
u8 data[6];
} __packed;
-static const struct edp_data tc348860_table[] = {
- /* set eDP bridge to eDP 1920 */
+static const struct edp_data b101uan01_table[] = {
+ /* set eDP bridge to 1200x1920 */
/* IO */
{ 6, 0x68, { 0x08, 0x00, 0x01, 0x00, 0x00, 0x00 } },
/* Boot */
@@ -173,7 +173,7 @@ static const struct edp_data tc348860_table[] = {
};
static const struct edp_data b101uan08_table[] = {
- /* set eDP bridge to eDP 1920 */
+ /* set eDP bridge to 1200x1920 */
/* IO Voltage Setting */
{ 6, 0x68, { 0x08, 0x00, 0x01, 0x00, 0x00, 0x00 } },
/* Boot Settings */
@@ -333,7 +333,7 @@ static void mainboard_configure_edp_bridge(void)
CPLD_PCB_VERSION_BIT;
printk(BIOS_DEBUG, "CPLD version: %x\n", cpld_version);
if (cpld_version < 7)
- edptable = tc348860_table;
+ edptable = b101uan01_table;
else
edptable = b101uan08_table;
@@ -341,7 +341,6 @@ static void mainboard_configure_edp_bridge(void)
outb(CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE, CPLD_RESET_PORT);
outb(CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE, CPLD_RESET_PORT);
- /* set eDP bridge to eDP 1920 */
while (edptable->payload_length) {
loops = 5;
do {
@@ -360,7 +359,6 @@ static void mainboard_configure_edp_bridge(void)
void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
{
- /* Configure the eDP bridge to eDP 1920 */
mainboard_configure_edp_bridge();
if (CONFIG(FSP1_1_DISPLAY_LOGO)) {