summaryrefslogtreecommitdiff
path: root/src/mainboard/facebook
diff options
context:
space:
mode:
authorMichael Niewöhner <foss@mniewoehner.de>2020-09-05 13:47:11 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-09-06 14:38:28 +0000
commit2539a672731e0f8059ce76a11a350a3a0c5ccddf (patch)
treedb2463ae12d30e05893b2a443a6acce0d5228e44 /src/mainboard/facebook
parent056d5523578dea5968d14ad1277ea263a5be7796 (diff)
downloadcoreboot-2539a672731e0f8059ce76a11a350a3a0c5ccddf.tar.xz
mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY
Setting USBx_PORT_EMPTY is not a requirement anymore, since unset devicetree settings default to 0 and the OC pin now only gets set when the USB port is enabled (see CB:45112). Thus, drop the setting from all devicetrees. Change-Id: I899349c49fa7de1c1acdca24994ebe65c01d80c6 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/mainboard/facebook')
-rw-r--r--src/mainboard/facebook/monolith/devicetree.cb8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb
index 6078741b70..95e2565a80 100644
--- a/src/mainboard/facebook/monolith/devicetree.cb
+++ b/src/mainboard/facebook/monolith/devicetree.cb
@@ -192,21 +192,13 @@ chip soc/intel/skylake
register "usb2_ports[2]" = "USB2_PORT_MID(OC1)" # USB3_TYPE-A Port 2
register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB-C Port 1
register "usb2_ports[4]" = "USB2_PORT_SHORT(OC_SKIP)" # M2 Port
- register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Disabled
register "usb2_ports[6]" = "USB2_PORT_SHORT(OC_SKIP)" # Audio board
- register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Disabled
- register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disabled
- register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Disabled
- register "usb2_ports[10]" = "USB2_PORT_EMPTY" # Disabled
- register "usb2_ports[11]" = "USB2_PORT_EMPTY" # Disabled
# USB 3.0 Enable Port 1-4. Port 5 & 6 Disabled
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB-C Port 2
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3_TYPE-A Port 1
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3_TYPE-A Port 2
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB-C Port 1
- register "usb3_ports[4]" = "USB3_PORT_EMPTY" # Disabled
- register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Disabled
register "SsicPortEnable" = "0"