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authorElyes HAOUAS <ehaouas@noos.fr>2020-05-09 13:21:47 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-10 13:12:18 +0000
commit674ad92923de63979f6ea1479de2f47a4efed138 (patch)
tree4cfe954434ed12c6a5c1b4c76fc58287373dd262 /src/mainboard/foxconn
parent7a0bcb7fb4b4c120031b6f63299c46d432d1f85a (diff)
downloadcoreboot-674ad92923de63979f6ea1479de2f47a4efed138.tar.xz
src/mainboard: Replace GPLv2 long form headers with SPDX header
Change-Id: I64d9468682a4aae3084b17b8724d035f17d01dff Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41187 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/foxconn')
-rw-r--r--src/mainboard/foxconn/d41s/devicetree.cb14
-rw-r--r--src/mainboard/foxconn/g41s-k/devicetree.cb14
2 files changed, 2 insertions, 26 deletions
diff --git a/src/mainboard/foxconn/d41s/devicetree.cb b/src/mainboard/foxconn/d41s/devicetree.cb
index 7594f489a4..52e1e63e5e 100644
--- a/src/mainboard/foxconn/d41s/devicetree.cb
+++ b/src/mainboard/foxconn/d41s/devicetree.cb
@@ -1,17 +1,5 @@
-#
# This file is part of the coreboot project.
-#
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
+# SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/pineview # Northbridge
register "gfx.use_spread_spectrum_clock" = "0"
diff --git a/src/mainboard/foxconn/g41s-k/devicetree.cb b/src/mainboard/foxconn/g41s-k/devicetree.cb
index dfc1534997..7369f53982 100644
--- a/src/mainboard/foxconn/g41s-k/devicetree.cb
+++ b/src/mainboard/foxconn/g41s-k/devicetree.cb
@@ -1,17 +1,5 @@
-##
## This file is part of the coreboot project.
-##
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
+## SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on # APIC cluster