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authorStefan Reinauer <stepan@coresystems.de>2010-05-16 14:24:41 +0000
committerStefan Reinauer <stepan@openbios.org>2010-05-16 14:24:41 +0000
commit7cfa7f97a1affb06f493a2335c99b213a91d335d (patch)
treec86b2106be931bf5d2746c5734a99fb9eb4e6c20 /src/mainboard/getac/p470/rtl8168.c
parent09e0c49f3649745aca4fa28770ac07f877281979 (diff)
downloadcoreboot-7cfa7f97a1affb06f493a2335c99b213a91d335d.tar.xz
Add support for the Getac P470
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/getac/p470/rtl8168.c')
-rw-r--r--src/mainboard/getac/p470/rtl8168.c77
1 files changed, 77 insertions, 0 deletions
diff --git a/src/mainboard/getac/p470/rtl8168.c b/src/mainboard/getac/p470/rtl8168.c
new file mode 100644
index 0000000000..f0f98d20f4
--- /dev/null
+++ b/src/mainboard/getac/p470/rtl8168.c
@@ -0,0 +1,77 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <delay.h>
+
+// #define RTL8168_DEBUG 1
+
+static void nic_init(struct device *dev)
+{
+ printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
+ // Nothing to do yet, but this has to be here to keep
+ // coreboot from trying to execute an option ROM.
+
+#ifdef RTL8168_DEBUG
+ u8 reg8;
+
+ printk(BIOS_DEBUG, "Resetting device... ");
+ pci_write_config8(dev, 0x37, (1 << 4));
+ do {
+ reg8 = pci_read_config8(dev, 0x37);
+ reg8 &= (1 << 4);
+ } while (reg8);
+ printk(BIOS_DEBUG, "ok\n");
+
+ printk(BIOS_DEBUG, "Eeprom Auto-Load... ");
+ reg8 = pci_read_config8(dev, 0x50);
+ reg8 &= 0x3f;
+ reg8 |= (1 << 6);
+ pci_write_config8(dev, 0x50, reg8);
+ mdelay(3);
+ printk(BIOS_DEBUG, "ok\n");
+#endif
+}
+
+static struct device_operations nic_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = nic_init,
+ .scan_bus = 0,
+};
+
+static const struct pci_driver rtl8168_nic __pci_driver = {
+ .ops = &nic_ops,
+ .vendor = 0x10ec,
+ .device = 0x8168,
+};
+
+#ifdef RTL8168_DEBUG
+static const struct pci_driver rtl8129_nic __pci_driver = {
+ .ops = &nic_ops,
+ .vendor = 0x10ec,
+ .device = 0x8129,
+};
+#endif
+