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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-08-25 18:35:42 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-25 18:35:42 +0000 |
| commit | bc8613ecaf858419288f4cef784c562f3d8a5093 (patch) | |
| tree | 767aeddf79a40354af772f1800c8629651b03857 /src/mainboard/getac | |
| parent | 6f22ecc2c920b41f5c48d96030333d1874f67c8d (diff) | |
| download | coreboot-bc8613ecaf858419288f4cef784c562f3d8a5093.tar.xz | |
Fix i945 based boards
- prevent GCC from inlining do_ram_command - it will break RAM initialization.
- fix the PCIRST# mechanism in those boards that do it, it requires 200ms, not
200us
- move PCIRST# as early as possible (before ich7_enable_lpc)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/getac')
| -rw-r--r-- | src/mainboard/getac/p470/romstage.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index 451f5d9d8a..9f7c14af52 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -308,9 +308,8 @@ void main(unsigned long bist) #if 0 /* Force PCIRST# */ pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR); - udelay(200); + udelay(200 * 1000); pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0); - udelay(200); #endif ich7_enable_lpc(); |