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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-01-17 15:27:18 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-01-18 20:46:48 +0000
commit8f274e147a24f0b877420dc045625e47705b4ed9 (patch)
tree6881b0c20bbf93769d749a8dbe5dc4d8513ef75e /src/mainboard/gigabyte/ga-6bxc
parent4c65398c10fa4583ad6b83ddc7f7873625a6ddbf (diff)
downloadcoreboot-8f274e147a24f0b877420dc045625e47705b4ed9.tar.xz
Intel i440bx boards: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. Mainboards: src/mainboard/a-trend/atc-6220 src/mainboard/a-trend/atc-6240 src/mainboard/abit/be6-ii_v2_0 src/mainboard/azza/pt-6ibd src/mainboard/biostar/m6tba src/mainboard/compaq/deskpro_en_sff_p600 src/mainboard/gigabyte/ga-6bxc src/mainboard/gigabyte/ga-6bxe src/mainboard/msi/ms6119 src/mainboard/msi/ms6147 src/mainboard/msi/ms6156 src/mainboard/nokia/ip530 src/mainboard/soyo/sy-6ba-plus-iii src/mainboard/tyan/s1846 Change-Id: Id895963f9641bcaaa65e8a8cb21213a758a9ad80 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/23301 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/gigabyte/ga-6bxc')
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/Kconfig39
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/Kconfig.name2
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/board_info.txt7
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/devicetree.cb57
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/irq_tables.c45
-rw-r--r--src/mainboard/gigabyte/ga-6bxc/romstage.c43
6 files changed, 0 insertions, 193 deletions
diff --git a/src/mainboard/gigabyte/ga-6bxc/Kconfig b/src/mainboard/gigabyte/ga-6bxc/Kconfig
deleted file mode 100644
index 0bb5dfee4a..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-if BOARD_GIGABYTE_GA_6BXC
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_INTEL_SLOT_1
- select NORTHBRIDGE_INTEL_I440BX
- select LATE_CBMEM_INIT
- select SOUTHBRIDGE_INTEL_I82371EB
- select SUPERIO_ITE_IT8671F
- select HAVE_PIRQ_TABLE
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default gigabyte/ga-6bxc
-
-config MAINBOARD_PART_NUMBER
- string
- default "GA-6BXC"
-
-config IRQ_SLOT_COUNT
- int
- default 6
-
-endif # BOARD_GIGABYTE_GA_6BXC
diff --git a/src/mainboard/gigabyte/ga-6bxc/Kconfig.name b/src/mainboard/gigabyte/ga-6bxc/Kconfig.name
deleted file mode 100644
index 4fb58428c6..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_GIGABYTE_GA_6BXC
- bool "GA-6BXC"
diff --git a/src/mainboard/gigabyte/ga-6bxc/board_info.txt b/src/mainboard/gigabyte/ga-6bxc/board_info.txt
deleted file mode 100644
index 029d54396d..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/board_info.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-Category: desktop
-Board URL: http://www.gigabyte.com/products/product-page.aspx?pid=1445#sp
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
-Release year: 1998
diff --git a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb
deleted file mode 100644
index 5b5c1ae325..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/intel/i440bx # Northbridge
- device cpu_cluster 0 on # APIC cluster
- chip cpu/intel/slot_1 # CPU
- device lapic 0 on end # APIC
- end
- end
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- device pci 1.0 on end # PCI/AGP bridge
- chip southbridge/intel/i82371eb # Southbridge
- device pci 7.0 on # ISA bridge
- chip superio/ite/it8671f # Super I/O
- device pnp 3f0.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 3f0.1 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 3f0.2 on # COM2 / IR
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 3f0.3 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 3f0.4 on # APC
- end
- device pnp 3f0.5 on # PS/2 keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 3f0.6 on # PS/2 mouse
- irq 0x70 = 12
- end
- device pnp 3f0.7 on # GPIO
- end
- end
- end
- device pci 7.1 on end # IDE
- device pci 7.2 on end # USB
- device pci 7.3 on end # ACPI
- register "ide0_enable" = "1"
- register "ide1_enable" = "1"
- register "ide_legacy_enable" = "1"
- # Enable UDMA/33 for higher speed if your IDE device(s) support it.
- register "ide0_drive0_udma33_enable" = "0"
- register "ide0_drive1_udma33_enable" = "0"
- register "ide1_drive0_udma33_enable" = "0"
- register "ide1_drive1_udma33_enable" = "0"
- end
- end
-end
diff --git a/src/mainboard/gigabyte/ga-6bxc/irq_tables.c b/src/mainboard/gigabyte/ga-6bxc/irq_tables.c
deleted file mode 100644
index 3a641d583d..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/irq_tables.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE,
- PIRQ_VERSION,
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
- 0x00, /* Interrupt router bus */
- (0x07 << 3) | 0x0, /* Interrupt router device */
- 0xc00, /* IRQs devoted exclusively to PCI usage */
- 0x8086, /* Vendor */
- 0x7000, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x8, /* Checksum */
- {
- /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00,(0x08 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
- {0x00,(0x09 << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
- {0x00,(0x0a << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
- {0x00,(0x0b << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
- {0x00,(0x07 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
- {0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c
deleted file mode 100644
index 7f85e0eeea..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/romstage.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/ite/it8671f/it8671f.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
- return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
- it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
-
- enable_smbus();
- sdram_initialize();
-}